lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 25 Jul 2016 10:02:59 +0100 From: Will Deacon <will.deacon@....com> To: fu.wei@...aro.org Cc: rjw@...ysocki.net, lenb@...nel.org, daniel.lezcano@...aro.org, tglx@...utronix.de, marc.zyngier@....com, lorenzo.pieralisi@....com, sudeep.holla@....com, hanjun.guo@...aro.org, linux-arm-kernel@...ts.infradead.org, linaro-acpi@...ts.linaro.org, linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org, rruigrok@...eaurora.org, harba@...eaurora.org, cov@...eaurora.org, timur@...eaurora.org, graeme.gregory@...aro.org, al.stone@...aro.org, jcm@...hat.com, wei@...hat.com, arnd@...db.de, wim@...ana.be, catalin.marinas@....com, Suravee.Suthikulpanit@....com, leo.duran@....com, linux@...ck-us.net, linux-watchdog@...r.kernel.org Subject: Re: [PATCH v8 4/9] clocksource/drivers/arm_arch_timer: use readq to get 64-bit CNTVCT On Wed, Jul 20, 2016 at 02:17:59AM +0800, fu.wei@...aro.org wrote: > From: Fu Wei <fu.wei@...aro.org> > > This patch simplify arch_counter_get_cntvct_mem function by > using readq to get 64-bit CNTVCT value instead of readl_relaxed. > > Signed-off-by: Fu Wei <fu.wei@...aro.org> > --- > drivers/clocksource/arm_arch_timer.c | 10 +--------- > 1 file changed, 1 insertion(+), 9 deletions(-) > > diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c > index e6fd42d..483d2f9 100644 > --- a/drivers/clocksource/arm_arch_timer.c > +++ b/drivers/clocksource/arm_arch_timer.c > @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void) > > static u64 arch_counter_get_cntvct_mem(void) > { > - u32 vct_lo, vct_hi, tmp_hi; > - > - do { > - vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); > - vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); > - tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); > - } while (vct_hi != tmp_hi); > - > - return ((u64) vct_hi << 32) | vct_lo; > + return readq(arch_counter_base + CNTVCT_LO); What's the benefit of doing this? If you use readq here, how can we guarantee that (a) the endpoint won't generate a SLVERR or similar and (b) that we get an atomic read? "If it ain't broke, don't fix it" Will
Powered by blists - more mailing lists