| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1469611615-2935-16-git-send-email-wei.guo.simon@gmail.com>
Date: Wed, 27 Jul 2016 17:26:40 +0800
From: wei.guo.simon@...il.com
To: Michael Ellerman <mpe@...erman.id.au>
Cc: Anshuman Khandual <khandual@...ux.vnet.ibm.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Shuah Khan <shuahkh@....samsung.com>,
Anton Blanchard <anton@...ba.org>,
Cyril Bur <cyrilbur@...il.com>,
Simon Guo <wei.guo.simon@...il.com>,
Ulrich Weigand <ulrich.weigand@...ibm.com>,
Michael Neuling <mikey@...ling.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Kees Cook <keescook@...omium.org>,
Rashmica Gupta <rashmicy@...il.com>,
Khem Raj <raj.khem@...il.com>, Jessica Yu <jeyu@...hat.com>,
Jiri Kosina <jkosina@...e.cz>, Miroslav Benes <mbenes@...e.cz>,
Suraj Jitindar Singh <sjitindarsingh@...il.com>,
Chris Smart <chris@...troguy.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
linux-kselftest@...r.kernel.org
Subject: [PATCH v12 15/30] powerpc/ptrace: Enable support for Performance Monitor registers
From: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
This patch enables support for Performance monitor registers related
ELF core note NT_PPC_PMU based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_PMU in powerpc
corresponding to the ELF core note sections added in this
regard. It also implements the get, set and active functions
for this new register sets added.
Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc: Paul Mackerras <paulus@...ba.org>
Cc: Michael Ellerman <mpe@...erman.id.au>
Cc: Shuah Khan <shuahkh@....samsung.com>
Cc: Anton Blanchard <anton@...ba.org>
Cc: Cyril Bur <cyrilbur@...il.com>
Cc: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
Cc: Simon Guo <wei.guo.simon@...il.com>
Cc: Ulrich Weigand <ulrich.weigand@...ibm.com>
Cc: Michael Neuling <mikey@...ling.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Kees Cook <keescook@...omium.org>
Cc: Rashmica Gupta <rashmicy@...il.com>
Cc: Khem Raj <raj.khem@...il.com>
Cc: Jessica Yu <jeyu@...hat.com>
Cc: Jiri Kosina <jkosina@...e.cz>
Cc: Miroslav Benes <mbenes@...e.cz>
Cc: Suraj Jitindar Singh <sjitindarsingh@...il.com>
Cc: Chris Smart <chris@...troguy.com>
Cc: linuxppc-dev@...ts.ozlabs.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-kselftest@...r.kernel.org
Signed-off-by: Anshuman Khandual <khandual@...ux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@...il.com>
---
arch/powerpc/include/uapi/asm/elf.h | 3 +-
arch/powerpc/kernel/ptrace.c | 75 +++++++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
index 8c4d71a..3a9e44c 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -94,7 +94,8 @@
#define ELF_NVMX 34 /* includes all vector registers */
#define ELF_NVSX 32 /* includes all VSX registers */
#define ELF_NTMSPRREG 3 /* include tfhar, tfiar, texasr */
-#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */
+#define ELF_NEBB 3 /* includes ebbrr, ebbhr, bescr */
+#define ELF_NPMU 5 /* includes siar, sdar, sier, mmcr2, mmcr0 */
typedef unsigned long elf_greg_t64;
typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 5cbabdb..1d8998b 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1824,6 +1824,75 @@ static int ebb_set(struct task_struct *target,
return ret;
}
+static int pmu_active(struct task_struct *target,
+ const struct user_regset *regset)
+{
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+ return -ENODEV;
+
+ return regset->n;
+}
+
+static int pmu_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ /* Build tests */
+ BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+ BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+ BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+ BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+ return -ENODEV;
+
+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ &target->thread.siar, 0,
+ 5 * sizeof(unsigned long));
+}
+
+static int pmu_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret = 0;
+
+ /* Build tests */
+ BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+ BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+ BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+ BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+ return -ENODEV;
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.siar, 0,
+ sizeof(unsigned long));
+
+ if (!ret)
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.sdar, sizeof(unsigned long),
+ 2 * sizeof(unsigned long));
+
+ if (!ret)
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.sier, 2 * sizeof(unsigned long),
+ 3 * sizeof(unsigned long));
+
+ if (!ret)
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.mmcr2, 3 * sizeof(unsigned long),
+ 4 * sizeof(unsigned long));
+
+ if (!ret)
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ &target->thread.mmcr0, 4 * sizeof(unsigned long),
+ 5 * sizeof(unsigned long));
+ return ret;
+}
#endif
/*
* These are our native regset flavors.
@@ -1857,6 +1926,7 @@ enum powerpc_regset {
#ifdef CONFIG_PPC_BOOK3S_64
REGSET_TAR, /* TAR register */
REGSET_EBB, /* EBB registers */
+ REGSET_PMR, /* Performance Monitor Registers */
#endif
};
@@ -1957,6 +2027,11 @@ static const struct user_regset native_regsets[] = {
.size = sizeof(u64), .align = sizeof(u64),
.active = ebb_active, .get = ebb_get, .set = ebb_set
},
+ [REGSET_PMR] = {
+ .core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
+ .size = sizeof(u64), .align = sizeof(u64),
+ .active = pmu_active, .get = pmu_get, .set = pmu_set
+ },
#endif
};
--
1.8.3.1
Powered by blists - more mailing lists