[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1469761153-85576-1-git-send-email-apronin@chromium.org>
Date: Thu, 28 Jul 2016 19:59:13 -0700
From: Andrey Pronin <apronin@...omium.org>
To: Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
Cc: Peter Huewe <peterhuewe@....de>,
Marcel Selhorst <tpmdd@...horst.net>,
Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
Christophe Ricard <christophe.ricard@...il.com>,
tpmdd-devel@...ts.sourceforge.net, linux-kernel@...r.kernel.org,
dtor@...omium.org, Andrey Pronin <apronin@...omium.org>
Subject: [PATCH] tpm: fix cacheline alignment for DMA-able buffers
Annotate buffers used in spi transactions as ____cacheline_aligned
to use in DMA transfers.
Signed-off-by: Andrey Pronin <apronin@...omium.org>
---
drivers/char/tpm/st33zp24/spi.c | 4 ++--
drivers/char/tpm/tpm_tis_spi.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/char/tpm/st33zp24/spi.c b/drivers/char/tpm/st33zp24/spi.c
index 9f5a011..0e9aad9 100644
--- a/drivers/char/tpm/st33zp24/spi.c
+++ b/drivers/char/tpm/st33zp24/spi.c
@@ -70,8 +70,8 @@
struct st33zp24_spi_phy {
struct spi_device *spi_device;
- u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];
- u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];
+ u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE] ____cacheline_aligned;
+ u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE] ____cacheline_aligned;
int io_lpcpd;
int latency;
diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c
index dbaad9c..58d7758 100644
--- a/drivers/char/tpm/tpm_tis_spi.c
+++ b/drivers/char/tpm/tpm_tis_spi.c
@@ -48,8 +48,8 @@ struct tpm_tis_spi_phy {
struct tpm_tis_data priv;
struct spi_device *spi_device;
- u8 tx_buf[MAX_SPI_FRAMESIZE + 4];
- u8 rx_buf[MAX_SPI_FRAMESIZE + 4];
+ u8 tx_buf[MAX_SPI_FRAMESIZE + 4] ____cacheline_aligned;
+ u8 rx_buf[MAX_SPI_FRAMESIZE + 4] ____cacheline_aligned;
};
static inline struct tpm_tis_spi_phy *to_tpm_tis_spi_phy(struct tpm_tis_data *data)
--
2.6.6
Powered by blists - more mailing lists