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Message-ID: <D6EDEBF1F91015459DB866AC4EE162CC0241BC4E@IRSMSX103.ger.corp.intel.com>
Date:	Fri, 29 Jul 2016 04:15:15 +0000
From:	"Odzioba, Lukasz" <lukasz.odzioba@...el.com>
To:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	"bp@...en8.de" <bp@...en8.de>,
	"dougthompson@...ssion.com" <dougthompson@...ssion.com>,
	"mchehab@...nel.org" <mchehab@...nel.org>
CC:	"Luck, Tony" <tony.luck@...el.com>,
	"Chrzaniuk, Hubert" <hubert.chrzaniuk@...el.com>,
	"Anaczkowski, Lukasz" <lukasz.anaczkowski@...el.com>
Subject: RE: [PATCH 1/1] EDAC, sb_edac: Fix channel reporting on Knights
 Landing

On Saturday, July 23, 2016 1:45 AM, Lukasz Odzioba wrote:
> On Intel Xeon Phi Knights Landing processor family the channels
> of memory controller have untypical arrangement - MC0 is mapped to
> CH3,4,5 and MC1 is mapped to CH0,1,2. This causes EDAC driver to
> report the channel name incorrectly.
>
> We missed this change earlier, so the code already contains
> similar comment, but the translation function is incorrect.
>
> Without this patch:
>  errors in DIMM_A and DIMM_D were reported in DIMM_D
>  errors in DIMM_B and DIMM_E were reported in DIMM_E
>  errors in DIMM_C and DIMM_F were reported in DIMM_F
>
> Fixes: d0cdf9003140 ("sb_edac: Add Knights Landing (Xeon Phi gen 2) support")

Hi,
I would greatly appreciate it if you kindly give me some feedback on this patch.

Thanks,
Lukas

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