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Message-ID: <579F05E1.9020300@arm.com>
Date:	Mon, 1 Aug 2016 09:18:41 +0100
From:	Marc Zyngier <marc.zyngier@....com>
To:	Masahiro Yamada <yamada.masahiro@...ionext.com>, arm@...nel.org
Cc:	Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will.deacon@....com>,
	linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [Urgent PATCH] arm64: dts: uniphier: fix IRQ trigger type of
 ARMv8 timer

Please keep me cc-ed on this.

On 01/08/16 09:12, Masahiro Yamada wrote:
> Since commit 1e2a7d78499e ("irqdomain: Don't set type when mapping
> an IRQ"), the interrupt type is strictly checked.  Without this
> patch, this board would not boot any more.
> 
> Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
> says that the 3rd cell should be either 1 (edge) or 4 (level)
> depending on the trigger type.  As the CA72 Generic Timer provides
> active-low interrupts, the value of the 3rd cell should be 4.
> 
> Signed-off-by: Masahiro Yamada <yamada.masahiro@...ionext.com>
> Suggested-by: Marc Zyngier <marc.zyngier@....com>
> ---
> Arnd, Olof,
> 
> I guess you are about to send pull-reqs for v4.8 cycle.
> Could you include this one in them?
> After IRQ updates for 4.8 were merged, my board would not
> boot at all.  I consulted experts and looks like my DT
> was wrong.
> 
> I could do this after -rc1 is out because it is apparently a
> bug fix, but in that case the for-next branch in ASOC will be
> broken for me, which would make bisect-ability difficult for me.

I have a patch that addresses all platforms in one go (there is really
no point in fixing one at a time for a bug that is so widespread).

I'll repost it later today.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

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