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Message-ID: <1470153381-20517-4-git-send-email-tthayer@opensource.altera.com>
Date: Tue, 2 Aug 2016 10:56:21 -0500
From: <tthayer@...nsource.altera.com>
To: <bp@...en8.de>, <dougthompson@...ssion.com>,
<m.chehab@...sung.com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
<galak@...eaurora.org>, <linux@....linux.org.uk>,
<dinguyen@...nsource.altera.com>, <grant.likely@...aro.org>
CC: <devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <tthayer.linux@...il.com>,
<tthayer@...nsource.altera.com>
Subject: [PATCH 3/3] ARM: dts: Add Arria10 SD/MMC EDAC devicetree entry
From: Thor Thayer <tthayer@...nsource.altera.com>
Add the device tree entries needed to support the Altera SD/MMC
FIFO buffer EDAC on the Arria10 chip.
Signed-off-by: Thor Thayer <tthayer@...nsource.altera.com>
---
arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
index 8a7dfa4..040a164 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -25,3 +25,15 @@
broken-cd;
bus-width = <4>;
};
+
+&eccmgr {
+ sdmmca-ecc@...c2c00 {
+ compatible = "altr,socfpga-sdmmc-ecc";
+ reg = <0xff8c2c00 0x400>;
+ altr,ecc-parent = <&mmc>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
+ <47 IRQ_TYPE_LEVEL_HIGH>,
+ <16 IRQ_TYPE_LEVEL_HIGH>,
+ <48 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
--
1.7.9.5
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