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Message-ID: <ff13c01a-a3f5-b11f-c342-926e98f64be3@linux.intel.com>
Date:	Wed, 10 Aug 2016 16:59:03 -0500
From:	Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
To:	Mark Brown <broonie@...nel.org>
Cc:	Vinod Koul <vinod.koul@...el.com>, mark.rutland@....com,
	oder_chiou@...ltek.com, alsa-devel@...a-project.org,
	devicetree@...r.kernel.org, Darren Hart <dvhart@...ux.intel.com>,
	lgirdwood@...il.com, linux-kernel@...r.kernel.org,
	Nicolin Chen <nicoleotsuka@...il.com>, robh+dt@...nel.org,
	bardliao@...ltek.com
Subject: Re: [alsa-devel] [PATCH] ASoC: rt5659: Add mclk controls

On 8/10/16 12:52 PM, Mark Brown wrote:
> On Wed, Aug 10, 2016 at 12:31:28PM -0500, Pierre-Louis Bossart wrote:
>
>> If we want to be consistent then we need to have a framework that handles
>> both the SOC clock sources and the codec internal clock tree (including
>> dividers and switches)
>> I wonder if what you are hinting at is the codec driver modeling its
>> internal PLL/clock tree with the clock API?
>
> I'm not just hinting at that, I've openly stated it quite a few times
> now!  :P  For the simpler CODECs it's kind of marginal if you need to
> bother but for anything more complex (even things with PLLs) it seems
> like the way forwards.

interesting, thanks for the precision. I must admit I missed this 
concept completely and I didn't see any codec vendors work in this 
direction so far. Ironically the x86 part may be the most straightforward...

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