linux-kernel - Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs

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Message-ID: <CACRpkdaN=wR4amskqMapTJzaTTMJZe2EQWRnyLMQkq_zuhr2eA@mail.gmail.com>
Date:	Fri, 12 Aug 2016 15:18:13 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Andrew Jeffery <andrew@...id.au>
Cc:	Alexandre Courbot <gnurou@...il.com>,
	Joel Stanley <joel@....id.au>,
	Mark Rutland <mark.rutland@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Russell King <linux@...linux.org.uk>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Jeremy Kerr <jk@...abs.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 02/12] pinctrl: Add core pinctrl support for Aspeed SoCs

On Fri, Aug 12, 2016 at 2:33 AM, Andrew Jeffery <andrew@...id.au> wrote:

>> > +
>> > +       while (*exprs) {
>> > +               if (strncmp((*exprs)->signal, "GPIO", 4) == 0)
>> > +                       return true;
>> This looks a bit fragile and hard to debug. Do you have some better
>> idea of how to do this but not resort to string comparison?
>
> Yes, this is a little unfortunate. GPIO is not always a pin's lowest
> priority function (e.g. the RGMII/RMII pins), so this makes the GPIO
> case like any other mux function: We need to know when to stop
> iterating the arrays when disabling mux functions of higher priority.
> The alternative is probably to introduce another field to struct
> aspeed_sig_expr and set that as necessary, but that feels redundant if
> we keep to a consistent naming for the GPIOs.

I would probably prefer that option (introduce another field)
but you should make the overall decision, it's no strong opinion
from my side.

> Would it be acceptable to document that requirement?

Sure.

Yours,
Linus Walleij