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Message-Id: <20160812.165753.1652467337612232120.davem@davemloft.net>
Date: Fri, 12 Aug 2016 16:57:53 -0700 (PDT)
From: David Miller <davem@...emloft.net>
To: appana.durga.rao@...inx.com
Cc: robh+dt@...nel.org, mark.rutland@....com, michal.simek@...inx.com,
soren.brinkmann@...inx.com, appanad@...inx.com,
f.fainelli@...il.com, andrew@...n.ch, punnaia@...inx.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH v6 0/3] net: phy: Add xilinx gmiitorgmii converter
support
From: Kedareswara rao Appana <appana.durga.rao@...inx.com>
Date: Wed, 10 Aug 2016 11:20:05 +0530
> The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media
> Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
> Ethernet physical media devices (PHY) and the Gigabit Ethernet controller.
> This core can be used in all three modes of operation(10/100/1000 Mb/s).
> The Management Data Input/Output (MDIO) interface is used to configure the
> Speed of operation. This core can switch dynamically between the three
> Different speed modes by configuring the conveter register through mdio write.
>
> The conveter sits b/w the MAC and external phy like below
>
> MACB <==> GMII2RGMII <==> RGMII_PHY
>
> MDIO <========> GMII2RGMII
> MCAB <=======>
> <========> RGMII
>
> Using MAC MDIO bus we can access both the converter and the external PHY.
> We need to program the line speed of the converter during run time based
> On the external phy negotiated speed.
>
> This patch series does the below
> ---> Add mask for Control register 10Mbps speed.
> ---> Add support for xilinx gmiitorgmii converter.
Series applied, thanks.
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