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Message-ID: <1471252229.4887.102.camel@linux.intel.com>
Date:	Mon, 15 Aug 2016 12:10:29 +0300
From:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:	kbuild test robot <fengguang.wu@...el.com>
Cc:	kbuild-all@...org, linux-kernel@...r.kernel.org,
	Linus Walleij <linus.walleij@...aro.org>,
	Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: drivers/pinctrl/intel/pinctrl-merrifield.c:518: error: implicit
 declaration of function 'readl'

On Sun, 2016-08-14 at 08:05 +0800, kbuild test robot wrote:
> Hi Andy,
> 
> FYI, the error/warning still remains.

Linus, can you apply the fix for next v4.8-rcX?

> 
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
> .git master
> head:   329f4152911c276b074bec75a0443f88821afdb7
> commit: 4e80c8f505741cbdef3e10862ea36057e8d85e7c pinctrl: intel: Add
> Intel Merrifield pin controller support
> date:   7 weeks ago
> config: x86_64-randconfig-s2-08140746 (attached as .config)
> compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
> reproduce:
>         git checkout 4e80c8f505741cbdef3e10862ea36057e8d85e7c
>         # save the attached .config to linux build tree
>         make ARCH=x86_64 
> 
> All errors (new ones prefixed by >>):
> 
>    drivers/pinctrl/intel/pinctrl-merrifield.c: In function
> 'mrfld_pin_dbg_show':
> > 
> > > 
> > > drivers/pinctrl/intel/pinctrl-merrifield.c:518: error: implicit
> > > declaration of function 'readl'
>    drivers/pinctrl/intel/pinctrl-merrifield.c: In function
> 'mrfld_update_bufcfg':
> > 
> > > 
> > > drivers/pinctrl/intel/pinctrl-merrifield.c:575: error: implicit
> > > declaration of function 'writel'
> 
> vim +/readl +518 drivers/pinctrl/intel/pinctrl-merrifield.c
> 
>    512		if (!mrfld_buf_available(mp, pin)) {
>    513			seq_puts(s, "not available");
>    514			return;
>    515		}
>    516	
>    517		bufcfg = mrfld_get_bufcfg(mp, pin);
>  > 518		value = readl(bufcfg);
>    519	
>    520		mode = (value & BUFCFG_PINMODE_MASK) >>
> BUFCFG_PINMODE_SHIFT;
>    521		if (!mode)
>    522			seq_puts(s, "GPIO ");
>    523		else
>    524			seq_printf(s, "mode %d ", mode);
>    525	
>    526		seq_printf(s, "0x%08x", value);
>    527	}
>    528	
>    529	static const struct pinctrl_ops mrfld_pinctrl_ops = {
>    530		.get_groups_count = mrfld_get_groups_count,
>    531		.get_group_name = mrfld_get_group_name,
>    532		.get_group_pins = mrfld_get_group_pins,
>    533		.pin_dbg_show = mrfld_pin_dbg_show,
>    534	};
>    535	
>    536	static int mrfld_get_functions_count(struct pinctrl_dev
> *pctldev)
>    537	{
>    538		struct mrfld_pinctrl *mp =
> pinctrl_dev_get_drvdata(pctldev);
>    539	
>    540		return mp->nfunctions;
>    541	}
>    542	
>    543	static const char *mrfld_get_function_name(struct
> pinctrl_dev *pctldev,
>    544						   unsigned int
> function)
>    545	{
>    546		struct mrfld_pinctrl *mp =
> pinctrl_dev_get_drvdata(pctldev);
>    547	
>    548		return mp->functions[function].name;
>    549	}
>    550	
>    551	static int mrfld_get_function_groups(struct pinctrl_dev
> *pctldev,
>    552					     unsigned int
> function,
>    553					     const char * const
> **groups,
>    554					     unsigned int *
> const ngroups)
>    555	{
>    556		struct mrfld_pinctrl *mp =
> pinctrl_dev_get_drvdata(pctldev);
>    557	
>    558		*groups = mp->functions[function].groups;
>    559		*ngroups = mp->functions[function].ngroups;
>    560		return 0;
>    561	}
>    562	
>    563	static void mrfld_update_bufcfg(struct mrfld_pinctrl
> *mp, unsigned int pin,
>    564					u32 bits, u32 mask)
>    565	{
>    566		void __iomem *bufcfg;
>    567		u32 value;
>    568	
>    569		bufcfg = mrfld_get_bufcfg(mp, pin);
>    570		value = readl(bufcfg);
>    571	
>    572		value &= ~mask;
>    573		value |= bits & mask;
>    574	
>  > 575		writel(value, bufcfg);
>    576	}
>    577	
>    578	static int mrfld_pinmux_set_mux(struct pinctrl_dev
> *pctldev,
> 
> ---
> 0-DAY kernel test infrastructure                Open Source Technology
> Center
> https://lists.01.org/pipermail/kbuild-all                   Intel
> Corporation

-- 
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy

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