linux-kernel - Re: kvm vmx shadow paging question

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <c28ccdf2-d9ea-6cf8-c651-7c606a487cc7@nextfour.com>
Date:	Mon, 15 Aug 2016 17:12:36 +0300
From:	Mika Penttilä <mika.penttila@...tfour.com>
To:	<kvm@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: Re: kvm vmx shadow paging question

On 13.08.2016 18:47, Mika Penttilä wrote:

> On 13.08.2016 17:38, Mika Penttilä wrote:
>
>> Hi,
>>
>> While studying the vmx code, and the shadow page tables usage (no ept involved),
>> I wondered the GUEST_CR3 usage. If no ept, GUEST_CR3 points to the shadow tables.
>> But the format of sptes is always 64 bit. How is that with 32 bit hosts, is the GUEST_CR3
>> similar to EPT format, 4 level 64 bit always or how is this working on 32 bit?
>>
>> Thanks,
>> Mika
>>
> Hmm seems non PAE 32 bit host without ept enabled is not supported combination, right ?
>
> --Mika
>
>

Ping, am I correct that for using shadow mmu with x86 kvm host you need at least 32bit PAE enabled host
(because shadow ptes are always 64 bit, in PAE or long format)?

--Mika