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Message-Id: <1471315139-28285-1-git-send-email-finley.xiao@rock-chips.com>
Date: Tue, 16 Aug 2016 10:38:56 +0800
From: Finlye Xiao <finley.xiao@...k-chips.com>
To: srinivas.kandagatla@...aro.org, maxime.ripard@...e-electrons.com,
heiko@...ech.de, robh+dt@...nel.org, frowand.list@...il.com,
sre@...nel.org, dbaryshkov@...il.com, dwmw2@...radead.org,
mark.rutland@....com, khilman@...nel.org, nm@...com,
rjw@...ysocki.net, viresh.kumar@...aro.org, sboyd@...eaurora.org
Cc: linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
wxt@...k-chips.com, jay.xu@...k-chips.com,
rocky.hao@...k-chips.com, tim.chen@...k-chips.com,
tony.xie@...k-chips.com, ulysses.huang@...k-chips.com,
lin.huang@...k-chips.com, Finley Xiao <finley.xiao@...k-chips.com>
Subject: [PATCH v1 0/3] PM / AVS: add Rockchip cpu avs
From: Finley Xiao <finley.xiao@...k-chips.com>
Under the same frequency, the operating voltage tends to decrease with
increasing leakage. so it is necessary to adjust opp's voltage according
to leakage for power.
Finley Xiao (3):
nvmem: rockchip-efuse: Change initcall to subsys
of: Add support for reading a s32 from a multi-value property.
PM / AVS: rockchip-cpu-avs: add driver handling Rockchip cpu avs
.../devicetree/bindings/power/rockchip-cpu-avs.txt | 37 +++
drivers/nvmem/rockchip-efuse.c | 9 +-
drivers/of/base.c | 23 ++
drivers/power/avs/Kconfig | 8 +
drivers/power/avs/Makefile | 1 +
drivers/power/avs/rockchip-cpu-avs.c | 314 +++++++++++++++++++++
include/linux/of.h | 10 +
7 files changed, 401 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt
create mode 100644 drivers/power/avs/rockchip-cpu-avs.c
--
1.9.1
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