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Message-ID: <20160817195958.10418.30303.stgit@bhelgaas-glaptop2.roam.corp.google.com>
Date:	Wed, 17 Aug 2016 14:59:58 -0500
From:	Bjorn Helgaas <bhelgaas@...gle.com>
To:	Joao Pinto <Joao.Pinto@...opsys.com>
Cc:	jszhang@...vell.com, jingoohan1@...il.com,
	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: [PATCH v6 2/4] PCI: designware: Move link wait definitions to .c
 file

From: Joao Pinto <Joao.Pinto@...opsys.com>

Move the link wait sleep definitions to the .c file as suggested by
Jisheng Zhang in a previous patch.

Signed-off-by: Joao Pinto <jpinto@...opsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
CC: Jisheng Zhang <jszhang@...vell.com>
---
 drivers/pci/host/pcie-designware.c |    5 +++++
 drivers/pci/host/pcie-designware.h |    5 -----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 1f6bd6d..e99f56e 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -26,6 +26,11 @@
 
 #include "pcie-designware.h"
 
+/* Parameters for the waiting for link up routine */
+#define LINK_WAIT_MAX_RETRIES		10
+#define LINK_WAIT_USLEEP_MIN		90000
+#define LINK_WAIT_USLEEP_MAX		100000
+
 /* Synopsis specific PCIE configuration registers */
 #define PCIE_PORT_LINK_CONTROL		0x710
 #define PORT_LINK_MODE_MASK		(0x3f << 16)
diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index 74a8fc6..285e1ed 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -22,11 +22,6 @@
 #define MAX_MSI_IRQS			32
 #define MAX_MSI_CTRLS			(MAX_MSI_IRQS / 32)
 
-/* Parameters for the waiting for link up routine */
-#define LINK_WAIT_MAX_RETRIES		10
-#define LINK_WAIT_USLEEP_MIN		90000
-#define LINK_WAIT_USLEEP_MAX		100000
-
 struct pcie_port {
 	struct device		*dev;
 	u8			root_bus_nr;

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