linux-kernel - Re: [Xen-devel] XSA 154 and ISA region (640K -> 1MB) WB cache instead of UC

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Message-Id: <57B5B4560200007800107092@prv-mh.provo.novell.com>
Date:	Thu, 18 Aug 2016 05:12:54 -0600
From:	"Jan Beulich" <JBeulich@...e.com>
To:	"Andrew Cooper" <andrew.cooper3@...rix.com>,
	"Konrad Rzeszutek Wilk" <konrad.wilk@...cle.com>
Cc:	<stefan.bader@...onical.com>, <david.vrabel@...rix.com>,
	"xen-devel" <xen-devel@...ts.xenproject.org>,
	"Boris Ostrovsky" <boris.ostrovsky@...cle.com>,
	<chuck.anderson@...cle.com>, "Juergen Gross" <JGross@...e.com>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [Xen-devel] XSA 154 and ISA region (640K -> 1MB) WB cache
 instead of UC

>>> On 18.08.16 at 12:16, <andrew.cooper3@...rix.com> wrote:
> On 18/08/16 11:06, Jan Beulich wrote:
>>>>> On 17.08.16 at 22:32, <konrad.wilk@...cle.com> wrote:
>>>    Looking at the kernel it assumes that WB is ok for 640KB->1MB.
>>>    The comment says:
>>>    " /* Low ISA region is always mapped WB in page table. No need to track 
> *"
>> As per above it's not clear to me what this comment is backed by.
> 
> This states what is in the pagetables.  Not the combined result with MTRRs.
> 
> WB in the pagetables and WC/UB in the MTRRs is a legal combination which
> functions correctly.

True, but then again - haven't I been told multiple times that Linux
nowadays prefers to run without using MTRRs?

Jan