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Date:	Thu, 18 Aug 2016 13:38:36 +0200
From:	Christophe Leroy <christophe.leroy@....fr>
To:	Gabriel Paubert <paubert@...m.es>
Cc:	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Paul Mackerras <paulus@...ba.org>,
	Michael Ellerman <mpe@...erman.id.au>,
	Scott Wood <oss@...error.net>, linuxppc-dev@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] powerpc/8xx: fix single_step debug



Le 18/08/2016 à 12:16, Gabriel Paubert a écrit :
> On Thu, Aug 18, 2016 at 12:13:21PM +0200, Christophe Leroy wrote:
>>
>>
>> Le 18/08/2016 à 11:58, Gabriel Paubert a écrit :
>>> On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote:
>>>> SPRN_ICR must be read for clearing the internal freeze signal which
>>>> is asserted by the single step exception, otherwise the timebase and
>>>> decrementer remain freezed
>>>
>>> Minor nit: s/freezed/frozen/
>>>
>>> If the timebase and decrementer are frozen even for a few cycles, this
>>> probably upsets timekeeping. I consider this a completely stupid design
>>> decision, and maybe I'm not alone.
>>>
>>>    Gabriel
>>
>> We could also unset TBF bit (TimeBase Freeze enable) in TBSCR
>> register (today it is set in
>> arch/powerpc/platforms/8xx/m8xx_setup.c) but then it would impact
>> debug done with an external BDM system which expects the decrementer
>> and TB frozen when it freezes the execution.
>
> Ok, I believe that systematically setting it is a mistake, but then I'm
> always a bit nervous about screwing up timekeeping (it certainly is
> always a very bad idea when you are driving telescopes).
>

Indeed you are right, this should not happen. The issue is due to the 
fact that the bootloader set the TRE bit in the DER register.
So the fix is to be done in the boot loader.

Christophe

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