lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <95d6e178-b9c5-ed40-2adc-5ffd1d78db07@cogentembedded.com>
Date:   Sun, 21 Aug 2016 14:06:18 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Randy Li <ayaka@...lik.info>, linux-usb@...r.kernel.org
Cc:     johnyoun@...opsys.com, gregkh@...uxfoundation.org,
        robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, eddie.cai@...k-chips.com,
        randy.li@...k-chips.com, kishon@...com,
        linux-kernel@...r.kernel.org, heiko@...ech.de,
        linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full
 PHY reset

Hello.

On 8/21/2016 10:56 AM, Randy Li wrote:

> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
> has a hardware errata that causes everything to get confused when we get
> a remote wakeup.  We'll use the reset that's in the CRU to reset the
> port when it's in a bad state.
>
> Note that we add the reset to both dwc2 controllers even though only one
> has the errata in case we find some other use for this reset that's
> unrelated to the current hardware errata.  Only the host port gets the
> quirk property, though.
>
> This patch came from Doug Anderson <dianders@...omium.org> originally.

    Was it signed off by him? Don't you need to keep his authorship via th 
"From:" tag?

> Signed-off-by: Randy Li <ayaka@...lik.info>
> ---
>  arch/arm/boot/dts/rk3288.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 48ca4e4..646f49d 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
[...]
> @@ -871,6 +873,9 @@
>  				clocks = <&cru SCLK_OTGPHY2>;
>  				clock-names = "phyclk";
>  				#clock-cells = <0>;
> +				resets = <&cru SRST_USBHOST1_PHY>;
> +				reset-names = "phy-reset";
> +

    Don't need empty line here.

>  			};
>  		};
>  	};

MBR , Sergei

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ