linux-kernel - Re: [RFC PATCH v3 1/7] irqchip: gic-v3: Reset BPR during initialization

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Message-ID: <57BAF105.1080604@arm.com>
Date:   Mon, 22 Aug 2016 13:33:09 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Daniel Thompson <daniel.thompson@...aro.org>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-kernel@...r.kernel.org, patches@...aro.org,
        linaro-kernel@...ts.linaro.org,
        John Stultz <john.stultz@...aro.org>,
        Sumit Semwal <sumit.semwal@...aro.org>,
        Dave Martin <dave.martin@....com>
Subject: Re: [RFC PATCH v3 1/7] irqchip: gic-v3: Reset BPR during
 initialization

On 19/08/16 17:13, Daniel Thompson wrote:
> Currently, when running on FVP, CPU 0 boots up with its BPR changed from
> the reset value. This renders it impossible to (preemptively) prioritize
> interrupts on CPU 0.
> 
> This is harmless on normal systems since Linux typically does not
> support preemptive interrupts. It does however cause problems in
> systems with additional changes (such as patches for NMI simulation).
> 
> Many thanks to Andrew Thoelke for suggesting the BPR as having the
> potential to harm preemption.
> 
> Suggested-by: Andrew Thoelke <andrew.thoelke@....com>
> Signed-off-by: Daniel Thompson <daniel.thompson@...aro.org>

Acked-by: Marc Zyngier <marc.zyngier@....com>

	M.
-- 
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