lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 22 Aug 2016 13:33:09 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Daniel Thompson <daniel.thompson@...aro.org>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-kernel@...r.kernel.org, patches@...aro.org,
        linaro-kernel@...ts.linaro.org,
        John Stultz <john.stultz@...aro.org>,
        Sumit Semwal <sumit.semwal@...aro.org>,
        Dave Martin <dave.martin@....com>
Subject: Re: [RFC PATCH v3 1/7] irqchip: gic-v3: Reset BPR during
 initialization

On 19/08/16 17:13, Daniel Thompson wrote:
> Currently, when running on FVP, CPU 0 boots up with its BPR changed from
> the reset value. This renders it impossible to (preemptively) prioritize
> interrupts on CPU 0.
> 
> This is harmless on normal systems since Linux typically does not
> support preemptive interrupts. It does however cause problems in
> systems with additional changes (such as patches for NMI simulation).
> 
> Many thanks to Andrew Thoelke for suggesting the BPR as having the
> potential to harm preemption.
> 
> Suggested-by: Andrew Thoelke <andrew.thoelke@....com>
> Signed-off-by: Daniel Thompson <daniel.thompson@...aro.org>

Acked-by: Marc Zyngier <marc.zyngier@....com>

	M.
-- 
Jazz is not dead. It just smells funny...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ