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Message-ID: <CACRpkdarLKZD21YF-q5PAerjbbJoKi790SAThPiYGDbGjhGC7g@mail.gmail.com>
Date:   Tue, 23 Aug 2016 12:29:43 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Icenowy Zheng <icenowy@...c.xyz>
Cc:     Russell King <linux@...linux.org.uk>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Hans de Goede <hdegoede@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 1/2] pinctrl: sunxi: fix uart1 CTS/RTS pins at PG on A23/A33

On Tue, Aug 23, 2016 at 7:58 AM, Icenowy Zheng <icenowy@...c.xyz> wrote:

> PG8, PG9 is said to be the CTS/RTS pins for UART1 according to the A23/33
> datasheets. However, the function is wrongly named "uart2" in the pinctrl
> driver. This patch fixes this by modifying them to be named "uart1".
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>

Applied for stable with Maxime's ACK.

Yours,
Linus Walleij

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