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Message-ID: <AM4PR0401MB173218BE03AEF9AB7D0F5FE79AEB0@AM4PR0401MB1732.eurprd04.prod.outlook.com>
Date: Tue, 23 Aug 2016 21:37:35 +0000
From: york sun <york.sun@....com>
To: "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>
CC: "morbidrsa@...il.com" <morbidrsa@...il.com>,
"oss@...error.net" <oss@...error.net>,
Stuart Yoder <stuart.yoder@....com>,
"bp@...en8.de" <bp@...en8.de>, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
"Will Deacon" <will.deacon@....com>,
Shawn Guo <shawnguo@...nel.org>,
"Olof Johansson" <olof@...om.net>, Gang Liu <gang.liu@....com>,
Mingkai Hu <Mingkai.Hu@...escale.com>,
Rajesh Bhagat <rajesh.bhagat@...escale.com>,
"Yao Yuan" <yao.yuan@....com>,
Bhupesh Sharma <bhupesh.sharma@...escale.com>,
Arnd Bergmann <arnd@...db.de>, Li Yang <leoli@...escale.com>,
yangbo lu <yangbo.lu@...escale.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [Patch v4 9/9] arm64: Update device tree for Layerscape SoCs
+Shawn Guo
On 08/09/2016 03:00 PM, York Sun wrote:
> Add DDR memory controller nodes to enable EDAC driver.
>
> Signed-off-by: York Sun <york.sun@....com>
>
> ---
> Change log
> v4: no change
> v3: no change
> v2: no change
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 7 +++++++
> arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 14 ++++++++++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index de0323b..cb33f23 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -196,6 +196,13 @@
> bus-width = <4>;
> };
>
> + ddr: memory-controller@...0000 {
> + compatible = "fsl,qoriq-memory-controller";
> + reg = <0x0 0x1080000 0x0 0x1000>;
> + interrupts = <0 144 0x4>;
> + big-endian;
> + };
> +
> dspi0: dspi@...0000 {
> compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
> #address-cells = <1>;
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> index 3187c82..3221e5c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
> @@ -689,4 +689,18 @@
> interrupts = <0 12 4>;
> };
> };
> +
> + ddr1: memory-controller@...0000 {
> + compatible = "fsl,qoriq-memory-controller";
> + reg = <0x0 0x1080000 0x0 0x1000>;
> + interrupts = <0 17 0x4>;
> + little-endian;
> + };
> +
> + ddr2: memory-controller@...0000 {
> + compatible = "fsl,qoriq-memory-controller";
> + reg = <0x0 0x1090000 0x0 0x1000>;
> + interrupts = <0 18 0x4>;
> + little-endian;
> + };
> };
>
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