linux-kernel - [PATCH v2 4/7] pinctrl: samsung: Add GPF support for Exynos5433

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Message-id: <1472046551-703-5-git-send-email-cw00.choi@samsung.com>
Date:   Wed, 24 Aug 2016 22:49:08 +0900
From:   Chanwoo Choi <cw00.choi@...sung.com>
To:     k.kozlowski@...sung.com, kgene@...nel.org, robh+dt@...nel.org,
        mark.rutland@....com, catalin.marinas@....com, will.deacon@....com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     krzk@...nel.org, cw00.choi@...sung.com, jh80.chung@...sung.com,
        sw0312.kim@...sung.com, jy0922.shim@...sung.com,
        inki.dae@...sung.com, jonghwa3.lee@...sung.com,
        beomho.seo@...sung.com, jaewon02.kim@...sung.com,
        human.hwang@...sung.com, ideal.song@...sung.com,
        ingi2.kim@...sung.com, m.szyprowski@...sung.com,
        a.hajda@...sung.com, s.nawrocki@...sung.com, chanwoo@...nel.org,
        Linus Walleij <linus.walleij@...aro.org>,
        Tomasz Figa <tomasz.figa@...il.com>, linux-gpio@...r.kernel.org
Subject: [PATCH v2 4/7] pinctrl: samsung: Add GPF support for Exynos5433

From: Joonyoung Shim <jy0922.shim@...sung.com>

This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need
to support the multiple memory map because the registers of GPFx are located
in the different domain.

Cc: Linus Walleij <linus.walleij@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Tomasz Figa <tomasz.figa@...il.com>
Cc: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc: Sylwester Nawrocki <s.nawrocki@...sung.com>
Cc: Kukjin Kim <kgene@...nel.org>
Cc: linux-gpio@...r.kernel.org
Signed-off-by: Joonyoung Shim <jy0922.shim@...sung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
[robh : Acked for binding documentation]
Acked-by: Rob Herring <robh@...nel.org>
---
 Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt | 1 +
 drivers/pinctrl/samsung/pinctrl-exynos.c                      | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 37bc692445d4..499fb3484915 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -19,6 +19,7 @@ Required Properties:
   - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
   - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
   - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
+  - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller.
   - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
 
 - reg: Base address of the pin controller hardware module and length of
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 12fa9d3f1113..b9605b8282be 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1360,6 +1360,11 @@ static const struct samsung_pin_bank_data exynos5433_pin_banks0[] = {
 	EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
 	EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
 	EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1, 0),
+	EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1, 0),
+	EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1, 0),
+	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1, 0),
+	EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1, 0),
 };
 
 /* pin banks of exynos5433 pin-controller - AUD */
@@ -1441,6 +1446,7 @@ const struct samsung_pin_ctrl exynos5433_pin_ctrl[] = {
 		.eint_wkup_init = exynos_eint_wkup_init,
 		.suspend	= exynos_pinctrl_suspend,
 		.resume		= exynos_pinctrl_resume,
+		.nr_ext_resources = 1,
 	}, {
 		/* pin-controller instance 1 data */
 		.pin_banks	= exynos5433_pin_banks1,
-- 
1.9.1