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Message-ID: <20160824190519.GA30097@kozik-book>
Date: Wed, 24 Aug 2016 21:05:19 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Milo Kim <woogyom.kim@...il.com>
Cc: Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
David Airlie <airlied@...ux.ie>, devicetree@...r.kernel.org,
linux-samsung-soc@...r.kernel.org,
Joonyoung Shim <jy0922.shim@...sung.com>,
Seung-Woo Kim <sw0312.kim@...sung.com>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Inki Dae <inki.dae@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 1/5] ARM: dts: exynos: Enable HDMI for Arndale Octa
board
On Wed, Aug 24, 2016 at 10:07:15PM +0900, Milo Kim wrote:
> * GPIO for HDMI hot plug detect
> GPX3_7 is used. The HPD awareness is done when the GPIO is active high and
> single ended.
>
> * Enable HDMI block in Exynos5420
> HDMI VDD and PLL consume 1.0V LDO6 (PVDD_ANAIP_1V0) and HDMI oscillator
> requires 1.8V LDO7 (PVDD_ANAIP_1V8).
>
> * Support HDMI display data channel
> I2C #2 is assigned for the HDMI DDC. It enables the EDID access.
>
> Cc: Kukjin Kim <kgene@...nel.org>
> Cc: Krzysztof Kozlowski <k.kozlowski@...sung.com>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-samsung-soc@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Signed-off-by: Milo Kim <woogyom.kim@...il.com>
> ---
> arch/arm/boot/dts/exynos5420-arndale-octa.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> index 39a3b81..2fb5708 100644
> --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
> @@ -70,6 +70,19 @@
> status = "disabled";
> };
>
First of all - it looks like these DTS patches do not depend on DRM
part, do they?
> +&hdmi {
> + hpd-gpios = <&gpx3 7 GPIO_OPEN_SOURCE>;
Are you sure it is open-source type?
> + vdd_osc-supply = <&ldo7_reg>;
> + vdd_pll-supply = <&ldo6_reg>;
> + vdd-supply = <&ldo6_reg>;
> + ddc = <&i2c_2>;
> + status = "okay";
> +};
> +
> +&i2c_2 {
> + status = "okay";
Hm, what is connected here? Please put it in alphabetical order (so
after hsi2c_4).
Best regards,
Krzysztof
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