linux-kernel - Re: [Regression?] Commit cb4f71c429 deliberately changes order of network interfaces

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Message-ID: <20160824215200.22de30d1@free-electrons.com>
Date:   Wed, 24 Aug 2016 21:52:00 +0200
From:   Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To:     lsorense@...lub.uwaterloo.ca (Lennart Sorensen)
Cc:     Ralph Sennhauser <ralph.sennhauser@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Gregory CLEMENT <gregory.clement@...e-electrons.com>
Subject: Re: [Regression?] Commit cb4f71c429 deliberately changes order of
 network interfaces

Hello,

On Wed, 24 Aug 2016 14:27:58 -0400, Lennart Sorensen wrote:
> On Wed, Aug 24, 2016 at 08:14:44PM +0200, Thomas Petazzoni wrote:
> > Depends on the network driver I believe. But with an e1000e NIC plugged
> > in a PCIe slot, it indeed gets assigned as eth0, and the internal
> > mvneta devices get eth1, eth2, etc.  
> 
> Which of course means the change does not actually ensure the port
> ordering matches the marvell documentation or u-boot.  It only handles
> the relative order of the ports.  For now.

Correct.

> So since it doesn't actually work, maybe reverting it so it no longer
> violates the dtb ordeting rule makes sense.

I'll let the platform maintainers decide what's the least
intrusive/problematic option. Both solutions have drawbacks, so it's
really a "political" decision to make here.

> Doesn't mean openwrt/lede/etc don't have to deal with the ordering in
> the future if async probing takes off.

Not only async probing, but also PCIe devices, as you mentioned
earlier :-)

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com