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Message-ID: <20160825005221.GK19826@codeaurora.org>
Date: Wed, 24 Aug 2016 17:52:21 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Jongsung Kim <neidhard.kim@....com>
Cc: Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh@...nel.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Chanho Min <chanho.min@....com>
Subject: Re: [PATCH v2] clk: fixed-factor: add optional dt-binding clock-flags
On 07/04, Jongsung Kim wrote:
> On 2016년 07월 02일 09:20, Stephen Boyd wrote:
> > Do you actually have an IC on the board that is doing some fixed
> > factor calculation? Or is this a clk driver design where we are
> > listing out each piece of an SoC's clk controller in DT?
> >
> The SoC has several PLLs of identical design, and one of them is divided
> to half and used for CPUs. The fixed-factor-clock represents the divider.
>
Ok, so it sounds like we can have the driver that registers the
CPU PLL also register the fixed factor clk? I fail to see why we
need this from DT in that case.
--
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