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Message-ID: <2ab8ab94-fa4d-2cd6-5805-a92ac5f9697e@rock-chips.com>
Date: Sat, 27 Aug 2016 23:05:20 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Ziyuan Xu <xzy.xu@...k-chips.com>, ulf.hansson@...aro.org,
robh+dt@...nel.org, heiko@...ech.de
Cc: shawn.lin@...k-chips.com, Mark Rutland <mark.rutland@....com>,
devicetree@...r.kernel.org,
Elaine Zhang <zhangqing@...k-chips.com>,
Catalin Marinas <catalin.marinas@....com>,
Xing Zheng <zhengxing@...k-chips.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Frank Wang <frank.wang@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Will Deacon <will.deacon@....com>,
linux-kernel@...r.kernel.org,
Douglas Anderson <dianders@...omium.org>,
linux-rockchip@...ts.infradead.org,
Jianqun Xu <jay.xu@...k-chips.com>,
David Wu <david.wu@...k-chips.com>,
Shunqian Zheng <zhengsq@...k-chips.com>,
linux-arm-kernel@...ts.infradead.org,
Caesar Wang <wxt@...k-chips.com>
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: add eMMC's power domain support
for rk3399
On 2016/8/27 21:41, Ziyuan Xu wrote:
> Control power domain for eMMC via genpd to reduce power consumption.
>
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> Signed-off-by: Ziyuan Xu <xzy.xu@...k-chips.com>
>
It looks nice to me. But this should be merged after applying that[0]
as your patch will break bind/unbind test for sdhci-of-arasan on rk3399
without it[0]. Moreover, Elaine should make sure that upstreamed
rockchip power domain stuff would not off pd for emmc, *otherwise*, I
should update my patch to make sure we update clkmul every time when
doing suspend 2 resume..
[0]: https://patchwork.kernel.org/patch/9300971/
> ---
>
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 32aebc8..71733d4 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -239,6 +239,7 @@
> #clock-cells = <0>;
> phys = <&emmc_phy>;
> phy-names = "phy_arasan";
> + power-domains = <&power RK3399_PD_EMMC>;
> status = "disabled";
> };
>
> @@ -611,6 +612,11 @@
> status = "disabled";
> };
>
> + qos_emmc: qos@...58000 {
> + compatible = "syscon";
> + reg = <0x0 0xffa58000 0x0 0x20>;
> + };
> +
> qos_hdcp: qos@...90000 {
> compatible = "syscon";
> reg = <0x0 0xffa90000 0x0 0x20>;
> @@ -739,6 +745,11 @@
> };
>
> /* These power domains are grouped by VD_LOGIC */
> + pd_emmc@...399_PD_EMMC {
> + reg = <RK3399_PD_EMMC>;
> + clocks = <&cru ACLK_EMMC>;
> + pm_qos = <&qos_emmc>;
> + };
> pd_vio@...399_PD_VIO {
> reg = <RK3399_PD_VIO>;
> #address-cells = <1>;
>
--
Best Regards
Shawn Lin
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