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Message-ID: <8520D5D51A55D047800579B094147198258D22D1@XAP-PVEXMBX01.xlnx.xilinx.com>
Date: Tue, 30 Aug 2016 10:46:18 +0000
From: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
To: Rob Herring <robh@...nel.org>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"pawel.moll@....com" <pawel.moll@....com>,
"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
"marc.zyngier@....com" <marc.zyngier@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Michal Simek <michals@...inx.com>,
"Ravikiran Gummaluri" <rgummal@...inx.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"galak@...eaurora.org" <galak@...eaurora.org>,
Soren Brinkmann <sorenb@...inx.com>
Subject: RE: [PATCH] PCI: Xilinx NWL PCIe: Updating device tree
documentation with prefetchable memory space
> Subject: Re: [PATCH] PCI: Xilinx NWL PCIe: Updating device tree documentation
> with prefetchable memory space
>
> On Tue, Aug 09, 2016 at 07:30:09PM +0530, Bharat Kumar Gogada wrote:
> > Updating device tree documentation with prefetchable memory sapce.
> > Configuration space shifted to 64-bit address space.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharatku@...inx.com>
> > ---
> > Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
>
> Acked-by: Rob Herring <robh@...nel.org>
Thanks Rob
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