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Message-ID: <20160830172929.16948-13-paul.burton@imgtec.com>
Date: Tue, 30 Aug 2016 18:29:15 +0100
From: Paul Burton <paul.burton@...tec.com>
To: <linux-mips@...ux-mips.org>, Ralf Baechle <ralf@...ux-mips.org>
CC: Paul Burton <paul.burton@...tec.com>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v2 12/26] MIPS: CPC: Provide a default mips_cpc_default_phys_base
Provide a weak default implementation of mips_cpc_default_phys_base
which reads the base address of the CPC from the device tree if
possible, and failing that returns the existing physical address of the
CPC as read from CPC base address GCR. This allows for platforms to make
use of the CPC without requiring platform code.
Signed-off-by: Paul Burton <paul.burton@...tec.com>
---
Changes in v2: None
arch/mips/kernel/mips-cpc.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/kernel/mips-cpc.c b/arch/mips/kernel/mips-cpc.c
index 566b8d2..b188787 100644
--- a/arch/mips/kernel/mips-cpc.c
+++ b/arch/mips/kernel/mips-cpc.c
@@ -9,6 +9,8 @@
*/
#include <linux/errno.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/percpu.h>
#include <linux/spinlock.h>
@@ -21,6 +23,22 @@ static DEFINE_PER_CPU_ALIGNED(spinlock_t, cpc_core_lock);
static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags);
+__weak phys_addr_t mips_cpc_default_phys_base(void)
+{
+ struct device_node *cpc_node;
+ struct resource res;
+ int err;
+
+ cpc_node = of_find_compatible_node(of_root, NULL, "mti,mips-cpc");
+ if (cpc_node) {
+ err = of_address_to_resource(cpc_node, 0, &res);
+ if (!err)
+ return res.start;
+ }
+
+ return read_gcr_cpc_base() & CM_GCR_CPC_BASE_CPCBASE_MSK;
+}
+
/**
* mips_cpc_phys_base - retrieve the physical base address of the CPC
*
--
2.9.3
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