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Message-ID: <CAGb2v66etp0AsYvs8n3MgBXehqV=kwkSnuq=Kt=aLtH4xvcDkA@mail.gmail.com>
Date: Wed, 31 Aug 2016 16:33:26 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Milo Kim <woogyom.kim@...il.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Chen-Yu Tsai <wens@...e.org>,
Linus Walleij <linus.walleij@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
devicetree <devicetree@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
linux-pwm@...r.kernel.org,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/4] ARM: dts: sun8i: Add PWM pin in H3
On Wed, Aug 31, 2016 at 4:25 PM, Milo Kim <woogyom.kim@...il.com> wrote:
> H3 PA5 pin is assigned for single PWM channel.
>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: Maxime Ripard <maxime.ripard@...e-electrons.com>
> Cc: Chen-Yu Tsai <wens@...e.org>
> Cc: devicetree@...r.kernel.org
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> Signed-off-by: Milo Kim <woogyom.kim@...il.com>
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index fdf9fdb..05d0c4b 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -360,6 +360,13 @@
> allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> };
>
> + pwm0_pin_a: pwm0@0 {
This is the only possible configuration. You can drop the _a suffix
from the label, and @0 from the node name.
ChenYu
> + allwinner,pins = "PA5";
> + allwinner,function = "pwm0";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> uart0_pins_a: uart0@0 {
> allwinner,pins = "PA4", "PA5";
> allwinner,function = "uart0";
> --
> 2.9.3
>
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