lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CALw8SCXgKcRPk8qk9GqPiL6sJV6gRt93eFHfxFHj3WJZNHgv7w@mail.gmail.com>
Date:   Wed, 31 Aug 2016 11:23:13 +0200
From:   Mirza Krak <mirza.krak@...il.com>
To:     Marcel Ziswiler <marcel.ziswiler@...adex.com>
Cc:     "jonathanh@...dia.com" <jonathanh@...dia.com>,
        "swarren@...dotorg.org" <swarren@...dotorg.org>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "pgaikwad@...dia.com" <pgaikwad@...dia.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "gnurou@...il.com" <gnurou@...il.com>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "pdeschrijver@...dia.com" <pdeschrijver@...dia.com>,
        "sboyd@...eaurora.org" <sboyd@...eaurora.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Subject: Re: [PATCH v2 0/6] Add support for Tegra GMI bus controller

Hi Marcel.

2016-08-30 17:01 GMT+02:00 Marcel Ziswiler <marcel.ziswiler@...adex.com>:
> Hi Mirza
>
> Sorry, I long since wanted to give you some feedback on this as well.
>
> BTW: Thank you very much for taking this on!

It has been and still is a fun project. So gladly doing it.
>
> On Wed, 2016-08-24 at 15:37 +0200, Mirza Krak wrote:
>> From: Mirza Krak <mirza.krak@...il.com>
>>
>> Hi.
>>
>> This is a follow up to my previous RFC to add support for Tegra GMI
>> bus
>> controller.
>>
>> I have tested this series on a Tegra30 using a Colibri T30 SOM on a
>> custom
>> carrier board which has multiple CAN controllers (SJA1000) connected
>> to the
>> GMI bus.
>
> We once did a nice GMI-Memory Board which mates with the extension
> connector X3 of our V3.x Colibri Evaluation boards and allows testing
> SRAM access not only in muxed but also in non-muxed mode albeit 16-bit
> only. I took your driver for a spin both on Colibri T20 as well as
> Colibri T30 both in muxed as well as non-muxed mode and it passed all
> tests being both manual devmem2 type reads/writes as well as memtester
> runs on the full 128K SRAM giving it the physical address using the -p
> argument.
>
> So you may add the following to the whole series:
>
> Tested-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
> Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board

Thank you very much for testing. Will add your tags in the upcoming V3.

Best Regards
Mirza

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ