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Message-Id: <1472607448-4462-4-git-send-email-shawn.lin@rock-chips.com>
Date: Wed, 31 Aug 2016 09:37:27 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh+dt@...nel.org>,
Ulf Hansson <ulf.hansson@...aro.org>
Cc: Adrian Hunter <adrian.hunter@...el.com>, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-rockchip@...ts.infradead.org,
Douglas Anderson <dianders@...omium.org>,
Ziyuan Xu <xzy.xu@...k-chips.com>,
linux-kernel@...r.kernel.org, Shawn Lin <shawn.lin@...k-chips.com>
Subject: [PATCH v2 3/4] arm64: dts: rockchip: add clk_syscon for sdhci on rk3399
We are intent on letting the sdhci variant driver handle this
optional clock on rk3399 platform now.
Signed-off-by: Shawn Lin <shawn.lin@...k-chips.com>
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index bc86e8c..d26c6ad 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -233,8 +233,9 @@
arasan,soc-ctl-syscon = <&grf>;
assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-rates = <200000000>;
- clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
- clock-names = "clk_xin", "clk_ahb";
+ clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>,
+ <&cru ACLK_EMMC_GRF>;
+ clock-names = "clk_xin", "clk_ahb", "clk_syscon";
clock-output-names = "emmc_cardclock";
#clock-cells = <0>;
phys = <&emmc_phy>;
--
2.3.7
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