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Message-ID: <20160831150236.GA10586@rob-hp-laptop>
Date: Wed, 31 Aug 2016 10:02:36 -0500
From: Rob Herring <robh@...nel.org>
To: Niklas Cassel <niklas.cassel@...s.com>
Cc: bhelgaas@...gle.com, mark.rutland@....com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, Niklas Cassel <niklass@...s.com>
Subject: Re: [PATCH RESEND] bindings: PCI: artpec: correct pci binding example
On Fri, Aug 26, 2016 at 12:01:56AM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@...s.com>
>
> - Increase config size. When using a PCIe switch,
> the previous config size only had room for one device.
> - Add bus range. Inherited optional property.
> - Map downstream I/O to PCI address 0. We can map it to any
> address, but let's be consistent with other drivers.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@...s.com>
> ---
> Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
As this is just a binding change, I've applied it.
Rob
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