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Date: Thu, 1 Sep 2016 12:21:54 +0200 From: Javier Martinez Canillas <javier@....samsung.com> To: Krzysztof Kozlowski <k.kozlowski@...sung.com>, Arnd Bergmann <arnd@...db.de>, Kukjin Kim <kgene@...nel.org>, Krzysztof Kozlowski <krzk@...nel.org>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com> Subject: Re: [PATCH 2/2] ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415 Hello Krzysztof, On 09/01/2016 10:37 AM, Krzysztof Kozlowski wrote: > The pinctrl drive strength register on exynos4415 is 2-bit wide for each > pin. The pins for SD2 were configured with value of 4. The driver does > not validate the value so this overflow effectively set a bit 1 in > adjacent pins thus configuring them to drive strength 2x. > > The author's intention was probably to set drive strength of 4x. > All other SD pins are configured with drive strength of 4x. Fix these > with same pattern. > > Fixes: 9246e7ff24c5 ("ARM: dts: Add dts files for exynos4415 SoC") > Signed-off-by: Krzysztof Kozlowski <k.kozlowski@...sung.com> > --- Reviewed-by: Javier Martinez Canillas <javier@....samsung.com> Best regards, -- Javier Martinez Canillas Open Source Group Samsung Research America
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