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Message-id: <5c3c5a13-ca2b-272d-e137-d7eaaffaafac@samsung.com>
Date:   Thu, 01 Sep 2016 19:32:18 +0200
From:   Sylwester Nawrocki <s.nawrocki@...sung.com>
To:     Chanwoo Choi <cw00.choi@...sung.com>
Cc:     tomasz.figa@...il.com, mturquette@...libre.com,
        sboyd@...eaurora.org, kgene@...nel.org, k.kozlowski@...sung.com,
        chanwoo@...nel.org, linux-samsung-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/3] clk: samsung: exynos5420: Add clocks for CMU_CDREX
 domain

On 08/25/2016 08:57 AM, Chanwoo Choi wrote:
> This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express
> Controller) which generates the clocks for DRAM and NoC (Network on Chip) bus
> clock. But, there is differnet source of MUX_MX_MSPLL_CCORE between exynos5420
> and exynos5422. So, each MUX_MX_MSPLL_CCORE uses the different parent source
> group.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>

Applied, thanks,

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