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Message-ID: <CAD=FV=VUy5hEZBT6ehpTS=5-moOJsSTqEM6tJeahZ-MeGz_5fg@mail.gmail.com>
Date:   Thu, 1 Sep 2016 20:54:00 -0700
From:   Doug Anderson <dianders@...omium.org>
To:     Finley Xiao <finley.xiao@...k-chips.com>
Cc:     Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Heiko Stübner <heiko@...ech.de>,
        linux@...linux.org.uk, Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Caesar Wang <wxt@...k-chips.com>,
        Shunqian Zheng <zhengsq@...k-chips.com>,
        Xu Jianqun <jay.xu@...k-chips.com>,
        Tao Huang <huangtao@...k-chips.com>,
        Tony Xie <tony.xie@...k-chips.com>, cl@...k-chips.com
Subject: Re: [PATCH v5 4/4] nvmem: rockchip-efuse: add rk3399-efuse support

Hi,

On Thu, Sep 1, 2016 at 8:16 PM, Finley Xiao <finley.xiao@...k-chips.com> wrote:
> 1) the efuse timing of rk3399 is different from earlier SoCs.
> 2) rk3399-efuse is organized as 32bits by 32 one-time programmable
> electrical fuses, the efuse of earlier SoCs is organized as 32bits
> by 8 one-time programmable electrical fuses with random access interface.
>
> This patch adds a new read function for rk3399-efuse.
>
> Signed-off-by: Finley Xiao <finley.xiao@...k-chips.com>
> Reviewed-by: Heiko Stuebner <heiko@...ech.de>
> ---
>  drivers/nvmem/rockchip-efuse.c | 133 +++++++++++++++++++++++++++++++++++------
>  1 file changed, 114 insertions(+), 19 deletions(-)

Reviewed-by: Douglas Anderson <dianders@...omium.org>

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