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Message-ID: <CAD=FV=V69XqyOp2OXrnjs-du=dFWShAWOzmf+NbtCZ8yk5dB3A@mail.gmail.com>
Date:   Thu, 1 Sep 2016 22:22:33 -0700
From:   Doug Anderson <dianders@...omium.org>
To:     Ziyuan Xu <xzy.xu@...k-chips.com>
Cc:     Mark Rutland <mark.rutland@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Brian Norris <briannorris@...omium.org>,
        Heiko Stübner <heiko@...ech.de>,
        Xing Zheng <zhengxing@...k-chips.com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Frank Wang <frank.wang@...k-chips.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Elaine Zhang <zhangqing@...k-chips.com>,
        Will Deacon <will.deacon@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Rob Herring <robh+dt@...nel.org>,
        David Wu <david.wu@...k-chips.com>,
        Shunqian Zheng <zhengsq@...k-chips.com>,
        Jianqun Xu <jay.xu@...k-chips.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Caesar Wang <wxt@...k-chips.com>
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: add eMMC's power domain support
 for rk3399

Hi,

On Thu, Sep 1, 2016 at 7:35 PM, Ziyuan Xu <xzy.xu@...k-chips.com> wrote:
>
>
> On 2016年09月02日 05:29, Doug Anderson wrote:
>>
>> Hi,
>>
>> On Wed, Aug 31, 2016 at 11:56 PM, Ziyuan Xu <xzy.xu@...k-chips.com> wrote:
>>>
>>> Hi
>>>
>>>
>>> On 2016年09月01日 12:20, Doug Anderson wrote:
>>>>
>>>> Hi,
>>>>
>>>> On Wed, Aug 31, 2016 at 7:29 PM, Ziyuan Xu <xzy.xu@...k-chips.com>
>>>> wrote:
>>>>>>
>>>>>> This is fine to pick up _only_ if you don't care about suspend/resume.
>>>>>> If you care about suspend/resume then someone needs to first write a
>>>>>> patch that will re-init all "corecfg" values after power is turned on.
>>>>>
>>>>>
>>>>> Do you mean corecfg_clockmultiplier and corecfg_baseclkfreq, if yes, we
>>>>> don't need to strore/re-init it after resume.
>>>>> corecfg_clockmultiplier is only used to fetch host->clk_mul, and
>>>>> host->clk_mul has been a fixed value at run-time, unless driver unbind.
>>>>> The same as corecfg_clockmultiplier, corecfg_baseclkfreq is used to
>>>>> check
>>>>> the xin_clk at probe time, we don't reference it at run-time.
>>>>> BTW, I have tested suspend/resume on rk3399 prior to this sumbit, eMMC
>>>>> works
>>>>> fine.
>>>>
>>>> I guess I don't actually know how the corecfg_clockmultiplier and
>>>> corecfg_baseclkfreq fields are actually used, but I presume that they
>>>> actually do something useful and aren't used to just communicate back
>>>> to software?
>>>
>>>
>>> Take corecfg_clockmultiplier as example.
>>> 1. sdhci driver fetch host->clk_mul from corecfg_clockmultiplier
>>> 2. mmc->f_min and mmc->f_max are calculated via host->clk_mul, they're
>>> used
>>> for further initialization.
>>> 3. if the corecfg_clockmultiplier is incorrect, sdhci will use improper
>>> frequency to play.
>>>
>>> I think we don't need to store it due to it's a fixed value at run-time,
>>> even if it is reset after a power cycle, the above will not be changed
>>> via
>>> software, except for dirver unbind .
>>>
>>>> I know that:
>>>>
>>>> 1. If I don't pick this patch and I suspend/resume,
>>>> corecfg_clockmultiplier and corecfg_baseclkfreq are still fine after
>>>> suspend / resume.
>>>>
>>>> 2. If I do pick this patch and I suspend/resume,
>>>> corecfg_clockmultiplier and corecfg_baseclkfreq are wrong after
>>>> suspend/resume (tested by reading /dev/mem directly from userspace
>>>> after suspend/resume).
>>>>
>>>>
>>>> Are you saying that it is unimportant that corecfg_clockmultiplier and
>>>> corecfg_baseclkfreq are wrong?
>>>
>>>
>>> Yup, corecfg_* stuff will be reset after a power cycle.
>>> I mean that we need only to guarantee they're correct at probe time.
>>
>> So are you saying that the entire purpose of "corecfg_clockmultiplier"
>> is that causes the "ClockMultiplier" field of the "EMMCCORE_CAP"
>> register to get a certain value?
>> ...and that the entire purpose of "corecfg_baseclkfreq" is that it
>> causes the "BaseClockFreqSDClock" field of the "EMMCCORE_CAP" register
>> to get a certain value?
>
> Yes, on rk3399:
> corecfg_clockmultiplier <===> EMMCCORE_CAP1[23:16] ClockMultiplier
> corecfg_baseclkfreq <===> EMMCCORE_CAP[15:8] BaseClockFreqSDClock
>
> If you re-write to either corecfg_* stuff,  the corresponding CAP register
> field will be changed too.
> sdhci driver will fetch CAP register for initialization, we only need to
> guarantee they're correct at probe time.
>
> Did that all make sense?

Yes.  Very odd, but it makes sense.

It would still be nice to get these restored after runtime resume just
for cleanliness, but it's not a blocker IMHO.

Reviewed-by: Douglas Anderson <dianders@...omium.org>

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