linux-kernel - [PATCH] crypto: qce: Initialize core src clock @100Mhz

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20160903164535.1118-1-voker57@gmail.com>
Date:   Sat,  3 Sep 2016 19:45:35 +0300
From:   Iaroslav Gridin <voker57@...il.com>
To:     herbert@...dor.apana.org.au
Cc:     davem@...emloft.net, linux-crypto@...r.kernel.org,
        linux-kernel@...r.kernel.org, andy.gross@...aro.org,
        david.brown@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-soc@...r.kernel.org, Iaroslav Gridin <voker57@...il.com>
Subject: [PATCH] crypto: qce: Initialize core src clock @100Mhz

Without that, QCE performance is about 2x less.

Signed-off-by: Iaroslav Gridin <voker57@...il.com>
---
 drivers/crypto/qce/core.c | 18 +++++++++++++++++-
 drivers/crypto/qce/core.h |  2 +-
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
index 0cde513..657354c 100644
--- a/drivers/crypto/qce/core.c
+++ b/drivers/crypto/qce/core.c
@@ -193,6 +193,10 @@ static int qce_crypto_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
+	qce->core_src = devm_clk_get(qce->dev, "core_src");
+	if (IS_ERR(qce->core_src))
+		return PTR_ERR(qce->core_src);
+
 	qce->core = devm_clk_get(qce->dev, "core");
 	if (IS_ERR(qce->core))
 		return PTR_ERR(qce->core);
@@ -205,10 +209,20 @@ static int qce_crypto_probe(struct platform_device *pdev)
 	if (IS_ERR(qce->bus))
 		return PTR_ERR(qce->bus);
 
-	ret = clk_prepare_enable(qce->core);
+	ret = clk_prepare_enable(qce->core_src);
 	if (ret)
 		return ret;
 
+	ret = clk_set_rate(qce->core_src, 100000000);
+	if (ret) {
+		dev_warn(qce->dev, "Unable to set QCE core src clk @100Mhz, performance might be degraded\n");
+		goto err_clks_core_src;
+	}
+
+	ret = clk_prepare_enable(qce->core);
+	if (ret)
+		goto err_clks_core_src;
+
 	ret = clk_prepare_enable(qce->iface);
 	if (ret)
 		goto err_clks_core;
@@ -247,6 +261,8 @@ err_clks_iface:
 	clk_disable_unprepare(qce->iface);
 err_clks_core:
 	clk_disable_unprepare(qce->core);
+err_clks_core_src:
+	clk_disable_unprepare(qce->core_src);
 	return ret;
 }
 
diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h
index 549965d..c5f8d08 100644
--- a/drivers/crypto/qce/core.h
+++ b/drivers/crypto/qce/core.h
@@ -42,7 +42,7 @@ struct qce_device {
 	int result;
 	void __iomem *base;
 	struct device *dev;
-	struct clk *core, *iface, *bus;
+	struct clk *core, *iface, *bus, *core_src;
 	struct qce_dma_data dma;
 	int burst_size;
 	unsigned int pipe_pair_id;
-- 
2.9.3