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Message-ID: <3040422.nFj5Be1ODN@phil>
Date: Sun, 04 Sep 2016 23:50:21 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Chris Zhong <zyw@...k-chips.com>
Cc: dianders@...omium.org, linux-rockchip@...ts.infradead.org,
zhengxing@...k-chips.com, ykk@...k-chips.com,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [v2 PATCH 1/3] clk: rockchip: Fractional dividers can't set parent rates
Am Donnerstag, 1. September 2016, 20:26:23 CEST schrieb Chris Zhong:
> From: Douglas Anderson <dianders@...omium.org>
>
> Currently the fractional divider clock time can't handle the
> CLK_SET_RATE_PARENT flag. This is because, unlike normal dividers,
> there is no clk_divider_bestdiv() function to try speeding up the parent
> to see if it helps things.
>
> Eventually someone could try to figure out how to make fractional
> dividers able to use CLK_SET_RATE_PARENT, but until they do let's not
> confuse the common clock framework (and anyone using it) by setting the
> flag.
>
> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> Signed-off-by: Chris Zhong <zyw@...k-chips.com>
applied to my clk-branch for 4.9, after changing the subject to
clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers
Heiko
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