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Message-ID: <CAGb2v66GsA8uNaaZfnnHFgBLA-LChCnO3vLhdtfzHNU0nHXH4Q@mail.gmail.com>
Date: Mon, 5 Sep 2016 22:00:01 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Chen-Yu Tsai <wens@...e.org>,
Jingoo Han <jingoohan1@...il.com>,
Lee Jones <lee.jones@...aro.org>,
Tomi Valkeinen <tomi.valkeinen@...com>,
Daniel Vetter <daniel.vetter@...el.com>,
David Airlie <airlied@...ux.ie>,
Thierry Reding <thierry.reding@...il.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
"linux-fbdev@...r.kernel.org" <linux-fbdev@...r.kernel.org>,
Mylene Josserand <mylene.josserand@...e-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Alexander Kaplan <alex@...tthing.co>
Subject: Re: [PATCH 3/6] drm/panel: simple: Add A10 EVB 5 inch panel support
On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard
<maxime.ripard@...e-electrons.com> wrote:
> The A10-EVB from Allwinner comes with an unidentified panel, with the only
> mark on the PCB being A10-SUB-EVB-5LCD.
>
> Add timings to simple panel to handle it.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 85143d1b9b31..be371b053aab 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -386,6 +386,29 @@ static void panel_simple_shutdown(struct device *dev)
> panel_simple_disable(&panel->base);
> }
>
> +static const struct drm_display_mode allwinner_a10_sub_evb_5lcd_mode = {
> + .clock = 33000,
> + .hdisplay = 800,
> + .hsync_start = 800 + 209,
> + .hsync_end = 800 + 209 + 1,
> + .htotal = 800 + 209 + 1 + 45,
> + .vdisplay = 480,
> + .vsync_start = 480 + 22,
> + .vsync_end = 480 + 22 + 1,
> + .vtotal = 480 + 22 + 1 + 22,
> + .vrefresh = 60,
I assume the numbers came from the fex file? Allwinner LCD timing numbers
aren't very precise. This seems to yield a refresh rate of 58.x Hz.
The dot clock can go below MHz resolution, so it should be possible
to set it to a more proper clock rate here.
ChenYu
> +};
> +
> +static const struct panel_desc allwinner_a10_sub_evb_5lcd = {
> + .modes = &allwinner_a10_sub_evb_5lcd_mode,
> + .num_modes = 1,
> + .size = {
> + .width = 110,
> + .height = 67,
> + },
> + .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
> +};
> +
> static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
> .clock = 33333,
> .hdisplay = 800,
> @@ -1515,6 +1538,9 @@ static const struct panel_desc urt_umsh_8596md_parallel = {
>
> static const struct of_device_id platform_of_match[] = {
> {
> + .compatible = "allwinner,sun4i-a10-sub-evb-5-lcd",
> + .data = &allwinner_a10_sub_evb_5lcd,
> + }, {
> .compatible = "ampire,am800480r3tmqwa1h",
> .data = &ire_am800480r3tmqwa1h,
> }, {
> --
> 2.9.2
>
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