linux-kernel - [PATCH 4.7 071/143] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs

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Message-Id: <20160905164433.614651757@linuxfoundation.org>
Date:   Mon,  5 Sep 2016 18:44:07 +0200
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Caesar Wang <wxt@...k-chips.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Jonathan Cameron <jic23@...nel.org>
Subject: [PATCH 4.7 071/143] arm64: dts: rockchip: add reset saradc node for rk3368 SoCs

4.7-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Caesar Wang <wxt@...k-chips.com>

commit 78ec79bfd59e126e1cb394302bfa531a420b3ecd upstream.

SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@...k-chips.com>
Acked-by: Heiko Stuebner <heiko@...ech.de>
Signed-off-by: Jonathan Cameron <jic23@...nel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi |    2 ++
 1 file changed, 2 insertions(+)

--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -270,6 +270,8 @@
 		#io-channel-cells = <1>;
 		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
 		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_SARADC>;
+		reset-names = "saradc-apb";
 		status = "disabled";
 	};