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Message-Id: <1473099435-28198-1-git-send-email-wxt@rock-chips.com>
Date: Tue, 6 Sep 2016 02:17:13 +0800
From: Caesar Wang <wxt@...k-chips.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: linux-rockchip@...ts.infradead.org,
Douglas Anderson <dianders@...omium.org>,
sonnyrao@...omium.org, linux-arm-kernel@...ts.infradead.org,
Caesar Wang <wxt@...k-chips.com>, devicetree@...r.kernel.org,
David Wu <david.wu@...k-chips.com>,
Elaine Zhang <zhangqing@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
linux-kernel@...r.kernel.org, Huang Tao <huangtao@...k-chips.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
Will Deacon <will.deacon@....com>,
Jianqun Xu <jay.xu@...k-chips.com>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Xing Zheng <zhengxing@...k-chips.com>
Subject: [PATCH v3 0/2] arm64: dts: rockchip: Support PMU for rk3399 SoCs
Hello Heiko, ARM guys
When Jay first submitted the rk3399.dtsi upstream
<https://patchwork.kernel.org/patch/8885821/> he had the PMU node in there,
but then took it out because the upstream binding wasn't done yet.
It looks as if the upstream stuff has landed, since in linux/master I see:
287e9357abcc DT/arm,gic-v3: Documment PPI partition support
e3825ba1af3a irqchip/gic-v3: Add support for partitioned PPIs
9e2c986cb460 irqchip: Add per-cpu interrupt partitioning library
222df54fd8b7 genirq: Allow the affinity of a percpu interrupt to be set/retrieved
651e8b54abde irqdomain: Allow domain matching on irq_fwspec
This series patches add to support the rk3399 SoCs PMU.
I pick up the https://patchwork.kernel.org/patch/9209369/.
As do some tests with ChromeOs for my rk3399 board.
Tested with next-20160905 kernel on rk3399 board.
https://github.com/Caesar-github/rockchip/tree/rk3399/pmu-upstream
localhost / # perf list
List of pre-defined events (to be used in -e):
cpu-cycles OR cycles [Hardware event]
instructions [Hardware event]
cache-references [Hardware event]
cache-misses [Hardware event]
branch-instructions OR branches [Hardware event]
branch-misses [Hardware event]
bus-cycles [Hardware event]
...
perf stat --cpu 0/1/2/3..... to minitor
e.g. cpu0;
localhost / # perf stat --cpu 0
Performance counter stats for 'CPU(s) 0':
3374.917571 task-clock (msec) # 1.001 CPUs utilized [100.00%]
20 context-switches # 0.006 K/sec [100.00%]
2 cpu-migrations # 0.001 K/sec [100.00%]
55 page-faults # 0.016 K/sec
7151843 cycles # 0.002 GHz [100.00%]
<not supported> stalled-cycles-frontend
<not supported> stalled-cycles-backend
4272536 instructions # 0.60 insns per cycle [100.00%]
568406 branches # 0.168 M/sec [100.00%]
65652 branch-misses # 11.55% of all branches
Also, 'perf top' to monitor the PMU interrupts from cpus
-Caesar
Changes in v3:
- update with the lastest next kernel(20160905).
- add Mark's ACK for PATCH[1/2].
- updated on next kernel(20160905).
- add the Mark's ACK for PATCH[2/2].
Changes in v2:
- AS Mark comments on https://patchwork.kernel.org/patch/9209369/
remove the interrupt-affinity property, we need depend on Marc' perf
code on https://patchwork.kernel.org/patch/9209369/.
Caesar Wang (2):
arm64: dts: rockchip: change all interrupts cells for 4 on rk3399 SoCs
arm64: dts: rockchip: support the pmu node for rk3399
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 122 ++++++++++++++++++-------------
1 file changed, 71 insertions(+), 51 deletions(-)
--
1.9.1
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