linux-kernel - Re: [PATCH v2 4/7] clk: sunxi-ng: Add N-class clocks support

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Message-ID: <CAGb2v67tM_3Q81=Mb1Nf0cja+oxBjJi=6mhkkpnvRM2i0BAmiQ@mail.gmail.com>
Date:   Wed, 7 Sep 2016 14:45:21 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:     Mike Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Hans de Goede <hdegoede@...hat.com>,
        Mylene Josserand <mylene.josserand@...e-electrons.com>,
        linux-clk <linux-clk@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Subject: Re: [PATCH v2 4/7] clk: sunxi-ng: Add N-class clocks support

On Tue, Sep 6, 2016 at 8:18 PM, Maxime Ripard
<maxime.ripard@...e-electrons.com> wrote:
> Add support for the class with a single factor, N, being a multiplier.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
> Acked-by: Chen-Yu Tsai <wens@...e.org>
> ---

[...]

> diff --git a/drivers/clk/sunxi-ng/ccu_mult.c b/drivers/clk/sunxi-ng/ccu_mult.c
> new file mode 100644
> index 000000000000..119b190c0eb5
> --- /dev/null
> +++ b/drivers/clk/sunxi-ng/ccu_mult.c

[...]

> +static int ccu_mult_set_rate(struct clk_hw *hw, unsigned long rate,
> +                          unsigned long parent_rate)
> +{
> +       struct ccu_mult *cm = hw_to_ccu_mult(hw);
> +       unsigned long flags;
> +       unsigned int n;
> +       u32 reg;
> +
> +       ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
> +                                               &parent_rate);
> +

Git complains about extra whitespace here.
You can keep my ack after fixing it.

ChenYu

> +       ccu_mult_find_best(parent_rate, rate, 1 << cm->mult.width, &n);
> +
> +       spin_lock_irqsave(cm->common.lock, flags);
> +
> +       reg = readl(cm->common.base + cm->common.reg);
> +       reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);
> +
> +       writel(reg | ((n - 1) << cm->mult.shift),
> +              cm->common.base + cm->common.reg);
> +
> +       spin_unlock_irqrestore(cm->common.lock, flags);
> +
> +       return 0;
> +}