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Message-ID: <87d1kgknod.fsf@linux.intel.com>
Date: Wed, 07 Sep 2016 13:29:54 +0300
From: Felipe Balbi <balbi@...nel.org>
To: Stefan Wahren <stefan.wahren@...e.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
John Youn <johnyoun@...opsys.com>
Cc: Michael Niewoehner <linux@...ewoehner.de>,
Tao Huang <huangtao@...k-chips.com>,
Julius Werner <jwerner@...omium.org>,
Caesar Wang <caesar.upstream@...il.com>,
Stephen Warren <swarren@...dotorg.org>,
Doug Anderson <dianders@...omium.org>,
linux-rpi-kernel@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
Heiko Stuebner <heiko@...ech.de>,
Kever Yang <kever.yang@...k-chips.com>,
Remi Pommarel <repk@...plefau.lt>
Subject: Re: [RFT PATCH v4 0/3] usb: dwc2: Fix core reset and force mode delays
Hi,
Stefan Wahren <stefan.wahren@...e.com> writes:
> Hi John,
>
>> John Youn <johnyoun@...opsys.com> hat am 1. September 2016 um 23:07
>> geschrieben:
>>
>>
>> This series accounts for the delay from the IDDIG debounce filter when
>> switching modes. This delay is a function of the PHY clock speed and
>> can range from 5-50 ms. This delay must be taken into account on core
>> reset and force modes. A full explanation is provided in the patch
>> commit log and code comments.
>>
>> This revision of the series increases the IDDIG delay to 100 ms. Some
>> rockchip platforms seem to timeout even with 50 ms so I have doubled
>> this.
>>
>> Appreciate any testing on RK3188 and RPi platforms.
>
> i tested the whole series successful with a Raspberry Pi B in dr_mode "host" and
> "otg"
>
> Tested-by: Stefan Wahren <stefan.wahren@...e.com>
John, when you're happy with the series, please resend without RFT so I
can apply :-)
--
balbi
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