linux-kernel - Re: [PATCH linux v3 3/9] xen: introduce xen_vcpu

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Message-ID: <878tv4t0le.fsf@vitty.brq.redhat.com>
Date:   Wed, 07 Sep 2016 13:23:41 +0200
From:   Vitaly Kuznetsov <vkuznets@...hat.com>
To:     Julien Grall <julien.grall@....com>
Cc:     Stefano Stabellini <sstabellini@...nel.org>,
        xen-devel@...ts.xenproject.org, linux-kernel@...r.kernel.org,
        x86@...nel.org, Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        David Vrabel <david.vrabel@...rix.com>,
        Juergen Gross <jgross@...e.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>, Jan Beulich <JBeulich@...e.com>,
        Andrew Cooper <andrew.cooper3@...rix.com>,
        Steve Capper <Steve.Capper@....com>,
        Wei Chen <Wei.Chen@....com>, Kaly Xin <Kaly.Xin@....com>
Subject: Re: [PATCH linux v3 3/9] xen: introduce xen_vcpu_id mapping

Julien Grall <julien.grall@....com> writes:

> Hi Vitaly,
>
> On 07/09/2016 10:07, Vitaly Kuznetsov wrote:
>> Stefano Stabellini <sstabellini@...nel.org> writes:
>>> I don't know that much about cpuid, but the virtual MPIDR is constructed
>>> from the vcpu id right now:
>>>
>>>     v->arch.vmpidr = MPIDR_SMP | vcpuid_to_vaffinity(v->vcpu_id);
>>>
>>>     [...]
>>>
>>>     static inline register_t vcpuid_to_vaffinity(unsigned int vcpuid)
>>>     {
>>>         register_t vaff;
>>>
>>>         vaff = (vcpuid & 0x0f) << MPIDR_LEVEL_SHIFT(0);
>>>         vaff |= ((vcpuid >> 4) & MPIDR_LEVEL_MASK) << MPIDR_LEVEL_SHIFT(1);
>>>
>>>         return vaff;
>>>     }
>>
>> This could work but only in case there is a way to get MPIDR for _other_
>> cpu (e.g. CPU0 needs to get MPIDR of CPU1 when CPU1 is not yet runnning)
>> or we'll have to change the machinery of how we bring up secondary CPUs
>> - e.g. CPUn starts, writes its id somewhere and 'hangs' waiting for CPU0
>> to set up event channels.
>
> You can get the MPIDR from both the device tree and ACPI. The firmware
> table is parsed at boot time and the value is stored in
> cpu_logical_map().

Good,

in this case we can easily do the same trick we did for x86 and we
don't need to change the way secondary CPUs are strarted.

BTW, were you able to try the patch I suggested? In my opinion it would
be preferable to fix the immediate SMP issue now and play with MPIDR
info later.

>
> Regards,

-- 
  Vitaly