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Message-ID: <CACRpkdb2ftH5B5VqKW9rPU=LMeWjrfo9jBTP5DKbNYeZAoMC8Q@mail.gmail.com>
Date: Wed, 7 Sep 2016 16:50:54 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Andrew Jeffery <andrew@...id.au>
Cc: Joel Stanley <joel@....id.au>,
Alexandre Courbot <gnurou@...il.com>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Jeremy Kerr <jk@...abs.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v3 5/8] pinctrl: Add core support for Aspeed SoCs
On Tue, Aug 30, 2016 at 9:54 AM, Andrew Jeffery <andrew@...id.au> wrote:
> The Aspeed SoCs typically provide more than 200 pins for GPIO and other
> functions. The signal enabled on a pin is determined on a priority
> basis, where a given pin can provide a number of different signal types.
>
> In addition to the priority levels, the Aspeed pin controllers describe
> the signal active on a pin by compound logical expressions involving
> multiple operators, registers and bits. Some difficulty arises as a
> pin's function bit masks for each priority level are frequently not the
> same (i.e. we cannot just flip a bit to change from a high to low
> priority signal), or even in the same register(s). Some configuration
> bits affect multiple pins, while in other cases the signals for a bus
> must each be enabled individually.
>
> Together, these features give rise to some complexity in the
> implementation. A more complete description of the complexities is
> provided in the associated header file.
>
> The patch doesn't implement pinctrl/pinmux/pinconf for any particular
> Aspeed SoC, rather it adds the framework for defining pinmux
> configurations.
>
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> Reviewed-by: Joel Stanley <joel@....id.au>
Patch applied! It's not getting better than this through iteration, it is better
to get the system up and develop inside the mainline tree from now on.
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1027,6 +1027,7 @@ S: Maintained
> F: arch/arm/mach-aspeed/
> F: arch/arm/boot/dts/aspeed-*
> F: drivers/*/*aspeed*
> +F: drivers/pinctrl/aspeed/
> F: Documentation/devicetree/bindings/*/*aspeed*
I dropped this hunk of the patch, because:
(A) I didn't merge the glob patch and
(B) the glob covers this driver too, it is a tautology/truism
Yours,
Linus Walleij
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