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Message-ID: <CAGXu5jK1b8_fTE_t2LMbTcRNc7K-6Z8rjbX=--_PNNn2PW3ygA@mail.gmail.com>
Date: Thu, 8 Sep 2016 15:01:52 -0700
From: Kees Cook <keescook@...omium.org>
To: Guenter Roeck <linux@...ck-us.net>
Cc: Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
LKML <linux-kernel@...r.kernel.org>,
Anton Vorontsov <anton@...msg.org>,
Colin Cross <ccross@...roid.com>,
Tony Luck <tony.luck@...el.com>
Subject: Re: pstore/core: drop cmpxchg based updates
On Thu, Sep 8, 2016 at 2:32 PM, Guenter Roeck <linux@...ck-us.net> wrote:
> On Wed, Aug 24, 2016 at 03:09:35PM +0200, Sebastian Andrzej Siewior wrote:
>> I have here a FPGA behind PCIe which exports SRAM which I use for
>> pstore. Now it seems that the FPGA no longer supports cmpxchg based
>> updates and writes back 0xff…ff and returns the same. This leads to
>> crash during crash rendering pstore useless.
>> Since I doubt that there is much benefit from using cmpxchg() here, I am
>> dropping this atomic access and use the spinlock based version.
>>
>> Cc: Anton Vorontsov <anton@...msg.org>
>> Cc: Colin Cross <ccross@...roid.com>
>> Cc: Kees Cook <keescook@...omium.org>
>> Cc: Tony Luck <tony.luck@...el.com>
>> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
>> Tested-by: Rabin Vincent <rabinv@...s.com>
>
> Great, one item taken off my task list.
>
> As Rabin suggested, this patch is needed for at least some ARM chips,
> and should be applied to stable releases.
Okay, I've annotated it now.
> Reviewed-by: Guenter Roeck <linux@...ck-us.net>
Thanks!
-Kees
--
Kees Cook
Nexus Security
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