linux-kernel - Re: [PATCH 1/1] usb: dwc3: fix Clear Stall EP command failure

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87inu6iuxw.fsf@linux.intel.com>
Date:   Thu, 08 Sep 2016 12:48:11 +0300
From:   Felipe Balbi <felipe.balbi@...ux.intel.com>
To:     Lu Baolu <baolu.lu@...ux.intel.com>
Cc:     linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
        Lu Baolu <baolu.lu@...ux.intel.com>, stable@...r.kernel.org
Subject: Re: [PATCH 1/1] usb: dwc3: fix Clear Stall EP command failure


Hi,

Lu Baolu <baolu.lu@...ux.intel.com> writes:
> Commit 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear
> Stall EP command") sets ClearPendIN bit for all IN endpoints in
> v2.60a+ cores no matter which speed mode they're in. This causes
> Clear Stall EP command failing on some Intel devices.

Well, the fact that is fails on some Intel device is, IMO, a
symptom. You should have said that ClearStall command fails on 2.60+
operating in HighSpeed mode. That's the real failure. It doesn't matter
if it's Intel or not, what matters is the *current* speed.

> In page 539 of 2.60a specification, it says:
>
> "When issuing Clear Stall command for IN endpoints in SuperSpeed
> mode, the software must set the "ClearPendIN" bit to '1' to
> clear any pending IN transcations, so that the device does not
> expect any ACK TP from the host for the data sent earlier."
>
> It's obviously that we only need to apply this rule to those IN

s/obviously/obvious/

> endpoints in SuperSpeed mode.

endpoints currently operating in SuperSpeed mode.

> Fixes: 50c763f8c1bac ("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command")
> Cc: stable@...r.kernel.org # 4.7+

please use proper email format:

Cc: <stable@...r.kernel.org> # v4.7+

> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
>  drivers/usb/dwc3/gadget.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
> index 7a8d3d8..f1858d6 100644
> --- a/drivers/usb/dwc3/gadget.c
> +++ b/drivers/usb/dwc3/gadget.c
> @@ -348,7 +348,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
>  	 * IN transfers due to a mishandled error condition. Synopsys
>  	 * STAR 9000614252.
>  	 */
> -	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
> +	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
> +	    (dwc->maximum_speed >= USB_SPEED_SUPER))

not sure this is correct. Based on text quoted above, it seems to be me
we should check *current* speed, not maximum speed. We hold current
speed in dwc->gadget.speed.

-- 
balbi

Download attachment "signature.asc" of type "application/pgp-signature" (801 bytes)