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Message-Id: <1473344836-26707-1-git-send-email-ayaka@soulik.info>
Date: Thu, 8 Sep 2016 22:27:12 +0800
From: Randy Li <ayaka@...lik.info>
To: linux-usb@...r.kernel.org
Cc: John.Youn@...opsys.com, kishon@...com,
felipe.balbi@...ux.intel.com, mark.rutland@....com,
devicetree@...r.kernel.org, heiko@...ech.de,
gregkh@...uxfoundation.org, linux-kernel@...r.kernel.org,
linux-rockchip@...ts.infradead.org, robh+dt@...nel.org,
randy.li@...k-chips.com, Randy Li <ayaka@...lik.info>
Subject: [PATCH 0/4] the fix for the USB HOST1 at rk3288 platform
At this stage it is the only "full features" and well verified
USB EHCI controller in this platform. More review is always necessary.
Changelog:
- v7:
adding a wrapper for the reset operation for phy
using that wrapper
- v6:
move pwms pinctrl to pwms node
fix the order of the dtb file in Makefile
- v5:
- correct the mail format
- v4:
- re-order some nodes in alphabetical order
- fix some minor bugs
- add a entry in vendor list
- v3:
- fixing the rtc clock, using clock source from PMIC
- enable the tmu
- enable the fimc for elite board
- suuport the audio codec at elite board
- fixing minor bugs in the last commit
- v2:
- removing rtc node
the clock source driver is not done yet.
- adding exynos-bus
- fixing the MFC
Randy Li (4):
phy: Add reset callback
phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during
wakeup
usb: dwc2: assert phy reset when waking up in rk3288 platform
ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset
.../devicetree/bindings/phy/rockchip-usb-phy.txt | 3 +++
arch/arm/boot/dts/rk3288.dtsi | 4 ++++
drivers/phy/phy-core.c | 14 ++++++++++++++
drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
drivers/usb/dwc2/core_intr.c | 11 +++++++++++
include/linux/phy/phy.h | 3 +++
6 files changed, 55 insertions(+)
--
2.7.4
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