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Message-ID: <0063a1ef-1b09-7cfc-f18b-76f2bb07eb84@st.com>
Date: Thu, 8 Sep 2016 17:47:02 +0200
From: Alexandre Torgue <alexandre.torgue@...com>
To: Linus Walleij <linus.walleij@...aro.org>
CC: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Daniel Thompson <daniel.thompson@...aro.org>,
Bruno Herrera <bruherrera@...il.com>,
Lee Jones <lee.jones@...aro.org>
Subject: Re: [PATCH v4 6/9] pinctrl: Add IRQ support to STM32 gpios
Hi Linus,
On 09/07/2016 11:06 PM, Linus Walleij wrote:
> On Tue, Sep 6, 2016 at 6:45 PM, Alexandre TORGUE
> <alexandre.torgue@...com> wrote:
>
>> This patch adds IRQ support to STM32 gpios.
>>
>> The EXTI controller has 16 lines dedicated to GPIOs.
>> EXTI line n can be connected to only line n of one of the GPIO ports, for
>> example EXTI0 can be connected to either PA0, or PB0, or PC0...
>> This port selection is done by specifying the port number into System
>> Config registers.
>>
>> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@...il.com>
>> Signed-off-by: Alexandre TORGUE <alexandre.torgue@...com>
>
>> +++ b/drivers/pinctrl/stm32/Kconfig
>> @@ -6,6 +6,8 @@ config PINCTRL_STM32
>> select PINMUX
>> select GENERIC_PINCONF
>> select GPIOLIB
>> + select GPIOLIB_IRQCHIP
>
> But you're not really using GPIOLIB_IRQCHIP. You have a different,
> super-complex irqchip in use.
Thanks Linus for this review. I will send a V5.
Just one question, when you say "super-complex irqchip in use", do you
mean I could use another (simplest) solution to handle this EXTI controller?
Regards
Alex
>
> So just don't select this.
>
>> + bank->gpio_chip.irqdomain = irq_domain_create_hierarchy(pctl->domain,
>> + 0, STM32_GPIO_IRQ_LINE, bank->fwnode,
>> + &stm32_gpio_domain_ops, bank);
>
> Don't use that irqdomain pointer inside the gpio_chip.
>
> Instead declare the irqdomain pointer inside struct stm32_gpio_bank
> or something like that.
>
> Yours,
> Linus Walleij
>
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