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Date: Mon, 12 Sep 2016 13:50:15 -0700 From: Tim Chen <tim.c.chen@...ux.intel.com> To: Thomas Gleixner <tglx@...utronix.de>, Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com> Cc: rjw@...ysocki.net, mingo@...hat.com, bp@...e.de, x86@...nel.org, linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org, peterz@...radead.org Subject: Re: [PATCH v3 1/8] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for ITMT On Sat, 2016-09-10 at 15:10 +0200, Thomas Gleixner wrote: > On Thu, 8 Sep 2016, Srinivas Pandruvada wrote: > > > > From: Tim Chen <tim.c.chen@...ux.intel.com> > > > > We uses ASYM_PACKING feature in the scheduler to move tasks to more > > capable cpus that can be boosted to higher frequency. This is enabled by > > Intel Turbo Boost Max Technology 3.0 (ITMT). We mark the sched domain > > topology level with SD_ASYM_PACKING flag for such systems to indicate > > scheduler can use the ASYM_PACKING feature to move load to the > > more capable cpus. > Sigh. This changelog does not tell anything about the nature of the patch, > the rationale for it etc. It's just a meaningless blurb. Okay, I can add more details about ITMT. Will also be clearer if the ITMT patch (patch 5) comes before this one. > > +} > > +#else > > +#define x86_core_flags cpu_core_flags > > +#define x86_smt_flags cpu_smt_flags > > +#endif > No. We first rework the code so that the IMT stuff can be added in a later > patch easily. I'll move this patch to come after current patch 5. Thanks. Tim
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