linux-kernel - Re: [PATCH] prctl,x86 Add PR_[GET|SET]_CPUID for controlling the CPUID instruction.

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Message-ID: <20160912175656.GA8935@laptop.thejh.net>
Date:   Mon, 12 Sep 2016 19:56:56 +0200
From:   Jann Horn <jann@...jh.net>
To:     Andy Lutomirski <luto@...capital.net>
Cc:     Kyle Huey <me@...ehuey.com>, Thomas Gleixner <tglx@...utronix.de>,
        John Stultz <john.stultz@...aro.org>,
        Ingo Molnar <mingo@...hat.com>, Michal Hocko <mhocko@...e.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        "Michael S. Tsirkin" <mst@...hat.com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>,
        Vlastimil Babka <vbabka@...e.cz>,
        "Luis R. Rodriguez" <mcgrof@...nel.org>,
        Mateusz Guzik <mguzik@...hat.com>,
        Alex Thorlton <athorlton@....com>,
        "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
        Dmitry Vyukov <dvyukov@...gle.com>,
        Vladimir Zapolskiy <vladimir_zapolskiy@...tor.com>,
        Jiri Slaby <jslaby@...e.cz>,
        Andrey Ryabinin <aryabinin@...tuozzo.com>,
        Ben Segall <bsegall@...gle.com>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        Denys Vlasenko <dvlasenk@...hat.com>,
        Paul Gortmaker <paul.gortmaker@...driver.com>,
        Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
        Robert O'Callahan <robert@...llahan.org>,
        "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" 
        <linux-kernel@...r.kernel.org>, Juergen Gross <jgross@...e.com>,
        Linux API <linux-api@...r.kernel.org>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Kees Cook <keescook@...omium.org>,
        "Peter Zijlstra (Intel)" <peterz@...radead.org>,
        Borislav Petkov <bp@...e.de>, Len Brown <len.brown@...el.com>,
        Huang Rui <ray.huang@....com>, "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH] prctl,x86 Add PR_[GET|SET]_CPUID for controlling the
 CPUID instruction.

On Mon, Sep 12, 2016 at 09:56:11AM -0700, Andy Lutomirski wrote:
> On Sep 11, 2016 5:29 PM, "Kyle Huey" <me@...ehuey.com> wrote:
> >
> > rr (http://rr-project.org/), a userspace record-and-replay reverse-
> > execution debugger, would like to trap and emulate the CPUID instruction.
> > This would allow us to a) mask away certain hardware features that rr does
> > not support (e.g. RDRAND) and b) enable trace portability across machines
> > by providing constant results.
> >
> > Intel supports faulting on the CPUID instruction in newer processors. Bit
> > 31 of MSR_PLATFORM_INFO advertises support for this feature. It is
> > documented in detail in Section 2.3.2 of
> > http://www.intel.com/content/dam/www/public/us/en/documents/application-notes/virtualization-technology-flexmigration-application-note.pdf.
[...]
> If this bit is preserved on fork(), then no_new_privs must be checked
> (or it must be cleared on "unsafe" exec, but that's nasty).

I think you mean "preserved on execve()"?