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Message-ID: <alpine.DEB.2.20.1609131530530.6233@nanos>
Date: Tue, 13 Sep 2016 15:41:50 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Harry Pan <harry.pan@...el.com>
cc: LKML <linux-kernel@...r.kernel.org>, gs0622@...il.com,
mingo@...hat.com, hpa@...or.com, x86@...nel.org,
peterz@...radead.org, bp@...en8.de,
srinivas.pandruvada@...ux.intel.com
Subject: Re: [PATCH 3/3] perf/x86/rapl: Enable Baytrail/Braswell RAPL
support
On Sun, 11 Sep 2016, Harry Pan wrote:
> This patch also enables multiple quirks.
This patch adds a single quirk for Baytrail.
Please stop sending out patches 5 seconds after a review. Take your time
and fixup stuff proper.
> +static void rapl_byt_quirk(void)
> +{
> + int i;
> +
> + /*
> + * Some Atom processors (BYT/BSW) have 2^ESU microjoules
> + * increment, refer to Software Developers' Manual, Vol. 3C,
> + * Order No. 325384, Table 35-8 of MSR_RAPL_POWER_UNIT.
> + *
> + * TODO: In order to fit BYT/BSW quirk model, here remind
> + * this generates timer rate in 80ms; by default
> + * ESU of BYT/BSW is 5, so it leads (1000/200)*2^4.
This sentence is not a sentence and I can't make any sense of it at
all.
What's the TODO here? And why is that TODO not addressed in this patch?
Thanks,
tglx
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